Xilinx ChipScope Pro User Manual

ChipScope Pro Software and Cores User Guide www.xilinx.com 179
UG029 (v14.3) October 16, 2012
CseFpga Tcl Commands
::chipscope::csefpga_configure_device
Configures an FPGA device with the contents of a byte array containing the contents of a
BIT, RBT, or MCS file.
Syntax
::chipscope::csefpga_configure_device handle deviceIndex format
fileData fileDataByteLen progressFunc<optional args>
Arguments
Table 5-46: Arguments for Subcommand ::chipscope::csefpga_configure_device
Argument Type Description
handle Required Handle to the session that is returned by
::chipscope::csejtag_session create
deviceIndex Required Device index (0 to n-1) in the n-length JTAG chain.
format Required Format of the configuration file. Valid choices are bit,
rbt, and mcs.
fileData Required Contents of configuration file in an array of bytes. The
bit file must be read in "binary mode". Other formats
may be read in "binary mode" or "text mode". Do not
remove Windows/unix end-of-line characters from
fileData.
fileDataByteLen Required Length of fileData byte array (in bytes).
<optional args> Optional Enables additional device configuration options. A list of
configuration options is provided in
Table 5-47.
progressFunc Required Function to show progress while shifting in
configuration data into the device. The format of the
progress callback function is:
proc progressFunc (handle totalCount
CurrentCount progressStatus) {...}
The progress callback function must return either
$CSE_STOP or $CSE_CONTINUE. If no progress
callback function is necessary, a 0 should be passed into
this argument position.
Table 5-47: Configuration Options
Option Name Values Description
reset_device reset_device=true,
reset_device=false
Controls whether or not device is reset during configuration.
Default is "reset_device=true".
shutdown_sequence shutdown_sequence=
true,
shutdown_sequence=
false
Use the JTAG SHUTDOWN command to shut down device. For
Spartan®-3 and Spartan-6 FPGA devices, this option has the
same effect as "reset_device=true". Default is
"shutdown_sequence=false".

Xilinx ChipScope Pro Specifications

General

Brand	Xilinx
Model	ChipScope Pro
Category	Computer Hardware
Language	English

Summary

Chapter 1: Introduction

ChipScope Pro Tools Overview

Overview of ChipScope Pro tools for FPGA debugging and analysis.

ChipScope Pro Tools Description

Brief description of various ChipScope Pro tools and cores.

System Requirements

Outlines the necessary operating system and software tools for ChipScope Pro.

Chapter 2: Using the Core Generator Tools

Overview

Introduction to using the Xilinx CORE Generator tool for ChipScope Pro cores.

Generating Cores for ICON, ILA, VIO and ATC2 Cores

Instructions for generating ICON, ILA, VIO, and ATC2 cores.

Chapter 3: Using the ChipScope Pro Core Inserter

ChipScope Pro Core Inserter Overview

Description of the post-synthesis tool for inserting debug cores.

Using the ChipScope Pro Core Inserter with ISE Project Navigator

Guide for integrating the Core Inserter with Project Navigator.

ChipScope Pro Core Inserter Features

Details on working with projects, preferences, and inserting cores.

Chapter 4: Using the ChipScope Pro Analyzer

ChipScope Pro Analyzer Overview

Introduction to the ChipScope Pro Analyzer tool for debugging.

ChipScope Pro Analyzer Client Interface

Description of the GUI components of the ChipScope Pro Analyzer client.

Trigger Setup Window

Configuration interface for setting up triggers for ILA cores.

Waveform Window

Displays captured data as a waveform, similar to logic analyzers.

Chapter 5: ChipScope Engine Tcl Interface

Overview

Introduction to Tcl scripting access for JTAG and ChipScope cores.

CSE/Tcl Command Summary

Summary of CSE/Tcl commands categorized for JTAG, FPGA, and cores.

CseJtag Tcl Commands

Detailed description of JTAG interface status and control commands.

Appendix A: ChipScope Pro Tools Troubleshooting Guide

ChipScope Pro Tools Installation Troubleshooting

Guidance on common errors and issues with ChipScope Pro tool installation.

Xilinx JTAG Programming Cable Troubleshooting

How to troubleshoot common Xilinx JTAG cable connection issues.

ChipScope Pro Analyzer Core Troubleshooting

Deals with issues in core detection, triggering, and data display.

Appendix B: References

Documents specific to multi-gigabit serial transceivers:

Lists documents related to multi-gigabit serial transceivers.

Xilinx Tools and Solutions

References to Xilinx tools and solutions documentation.