Xilinx ChipScope Pro User Manual

40 www.xilinx.com ChipScope Pro Software and Cores User Guide
UG029 (v14.3) October 16, 2012
Chapter 3: Using the ChipScope Pro Core Inserter
The Use SRLs checkbox is enabled by default to generate cores that use the optimized
SRL16 technology.
Using RPMs
The Use RPMs checkbox is used to select whether or not the individual cores are
relationally placed macros (RPMs). This option places restraints on the place-and-route tool
to optimize placement of all the logic for the core in one area. If your design uses most of
the resources in the device, these placement constraints might not be met. The Use RPMs
checkbox is checked by default in order to generate cores that are optimized for placement.
When this step is completed, click Next.
Core Utilization
The Core Utilization panel on the left side of the ChipScope Pro Core Inserter tool main
window displays an estimated count of the look-up table (LUT), flip-flop (FF), and block
RAM (BRAM) resources that are consumed by the ChipScope cores that are being inserted
into the design netlist. The core resource utilization counts are updated based on the
selection of various core parameters that affect the makeup of the cores being inserted into
the design netlist.
Note: The LUT Count and FF Count core utilization features are only available for the Spartan-3,
Spartan-3E, Spartan-3A, Spartan-3A DSP, and Virtex-4 device families (and the variants of these
families). The BRAM Count core utilization feature is available for all supported device families.
Choosing ICON Options
The first options that must be specified are for the ICON core. The ICON core is the
controller core that connects all ILA and ATC2 cores to the JTAG (Joint Test Action Group,
IEEE standard) boundary scan chain.
Selecting the Boundary Scan Chain
The ChipScope Pro Analyzer tool can communicate with the cores using either the USER1,
USER2, USER3, or USER4 boundary scan chains. You can select the desired scan chain
from the Boundary Scan Chain pull-down list. This option is not available when targeting
the Spartan-3, Spartan-3E, Spartan-3A, or Spartan-3A DSP device families (or the variants
of these families).
Choosing ILA Trigger Options and Parameters
A new ILA unit is created in the device hierarchy on the left when the New ILA Unit
button is clicked. The next step is to set up the ILA unit. The first ILA core tab panel sets up
the trigger options for the ILA core.
Selecting the Number of Trigger Ports
Each ILA core can have up to 16 separate trigger ports that can be set up independently.
After you select the number of trigger ports from the Number of Input Trigger Ports pull-
down list, a group of options appears for each of these ports. The group of options
associated with each trigger port is labeled with TRIGn, where n is the trigger port number
0 to 15. The trigger port options include trigger width, number of match units connected to
the trigger port, and the type of these match units.

Xilinx ChipScope Pro Specifications

General

Brand	Xilinx
Model	ChipScope Pro
Category	Computer Hardware
Language	English