Xilinx VC707 User Manual

72 www.xilinx.com VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
Chapter 1: VC707 Evaluation Board Features
FMC_VADJ Voltage Control
The FMC_VADJ rail is set to 1.8V. When the VC707 board is powered on, the state of the
FMC_VADJ_ON_B signal wired to header J51 is sampled by the TI UCD9248 controller
U42. If a jumper is installed on J51 signal FMC_VADJ_ON_B is held low, and the TI
controller U42 energizes the FMC_VADJ rail at power on.
Because the rail turn on decision is made at power on time based on the presence of the J51
jumper, removing the jumper at J51 after the board is powered up does not affect the 1.8V
power delivered to the FMC_VADJ rail and it remains on.
A jumper installed at J51 is the default setting.
If a jumper is not installed on J51, signal FMC_VADJ_ON_B is high, and the VC707 board
does not energize the FMC_VADJ 1.8V at power on. In this mode the user can control when
to turn on FMC_VADJ and to what voltage level (1.2V, 1.5V, 1.8V). With FMC_VADJ off, the
FPGA still configures and has access to the TI controller PMBUS along with the
VADJ_ON_B signal. The combination of these allows the user to develop code to
command the FMC_VADJ rail to be set to something other than the default setting of 1.8V.
After the new FMC_VADJ voltage level has been programmed into TI controller U42, the
VADJ_ON_B signal can be driven low by the user logic and the FMC_VADJ rail comes up
at the new FMC_VADJ voltage level. Installing a jumper at J51 after a VC707 board powers
up in this mode turns on the FMC_VADJ rail.
Documentation describing PMBUS programming for the UCD9248 digital power
controller is available at the Texas Instruments website [Ref 24].
Monitoring Voltage and Current
Voltage and current monitoring and control are available for selected power rails through
Texas Instruments' Fusion Digital Power graphical user interface. The three onboard TI
power controllers (U42 at address 52, U43 at address 53, and U64 at address 54) are wired
to the same PMBus. The PMBus connector, J5, is provided for use with the TI USB Interface
Adapter PMBus pod (TI part number EVM USB-TO-GPIO), which can be ordered from the
TI website [Ref 24], and the associated TI Fusion Digital Power Designer GUI
(downloadable from [Ref 24]). This is the simplest and most convenient way to monitor the
voltage and current values for the power rail listed in Table 1-30, Table 1-31, and
Table 1-32.
In each of these the three tables (one per controller), the Power Good (PG) On Threshold is
the set-point at or above which the particular rail is deemed “good”. The PG Off Threshold
is the set-point at or below which the particular rail is no longer deemed “good”. The
controller internally OR's these PG conditions together and drives an output PG pin high
only if all active rail PG states are “good”. The On and Off Delay and rise and fall times are
relative to when the board power on-off slide switch SW12 is turned on and off.
TPS51200DR U33 Tracking Regulator, 3A VTTDDR 0.75V 46
Notes:
1. See Table 1-30.
2. See Table 1-31.
3. See Table 1-34.
Table 1-29: Onboard Power System Devices (Cont’d)
Device Type
Reference
Designator
Description
Power Rail
Net Name
Power Rail
Voltage
Schematic
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Xilinx VC707 Specifications

General

Brand	Xilinx
Model	VC707
Category	Motherboard
Language	English