5.4 Block Description
5-8
5.4.2 DUP RX (05P0777)
This board is to be installed in FM-8800D and converts 160 MHz band RX signal of
DUPLEX RX frequency to 2
nd
IF and outputs it into CPU board. The self-test of this
board detects Un-Lock/Lock signal upon assessing the function of PLL circuit of 1
st
local on this board. When installing this board and if J3 - #11 (DUP INST) is “L” level
then, CPU recognizes FM-8800D is in use and switches its program to one compatible
with DUPLEX. The main specifications are below.
Table 5.4.2 Main Specification of DUP RX PCB
Item Specification
RX frequency 160.625 MHz to 162.025 MHz
Antenna input (J1) Impedance 160 MHz/50 ohm
1
st
IF frequency 51.2375 MHz
2
nd
IF frequency (DUP IF OUT) 37.5 kHz/5 kohm, - 60 to +10 dBm output
1
st
Local frequency
Fo + 51.2375 MHz TP1 level: +3 to 5 dBm
TP4: VCO cont ! 4 to 5VDC at CH18(161.5MHz)
2
nd
Local frequency 51.2 MHz (0 dBm, 50 ohm) TP3 level: -2 to -1 dBm
Sensitivity
SINAD 20 dB: below 2 dBuV.
NOTE: Loss of DUPLEXER somewhat lowers RX sensitivity
on TX/RX board compared to (SIMPLEX).
Fig. 5.4.3 DUP RX (05P0777) Block Diagram
PMBFJ310
VCO
LPF
PLL
PLL2 UN-LOCK
BPF(L/C)
BPF(L/C)
BPF(L/C)
ISS271
BPF(L/C)
2SC3356
1SV229
51.2MHz
Rx 1st Lo
(Fo+51.2375MHz)
PLL2 DATA
(CLK/DATA/STB)
CR10/11
CR8/9
U5
Q5
FL1
(51.2375MHz)
U8
U3
(LMX2353TMX)
Q6, CR3/4
Q11
uPC2745TB
2SC3356
U4
Q13Q1
Q4
Q14
uPC2745TB
Q10
U30
CPU
U17
CODEC
CPU
05P0773
DUP RX
05P0777
PMBFJ310
2SK882
Q15
2SC3324
2SC3356
Rx 2nd Lo
(51.2MHz)
MA2J728
DUP IF OUT
37.5kHz
TC75HU04F
X2
DUP INST
25.6MHz
Ref.
OSC
TP4
TP1
TP6
TP3
TP5
DUP RX
J1
J2
J3-#6, 7, 8
J3-#11
J3-#3
J3-#1
J3-#14
J3-#9
U20
DSP
U7
(TA48L033F)
R15V
R15V
+15V
+15V
RX ON
+5V
+15V
J3-#10
RX ON
+5V
REG.
U10
(TA78L12F)
+15V+12V
REG.
+3.3V
Q8
Q7
R15V R15V
TP2
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