Mitsubishi MELSEC Q Series Programming Manual

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2.8 Multiple CPU high-speed transmission dedicated instruction 2.8.1 Instructions for Multiple CPU high-speed transmission dedicated
2.8 Multiple CPU high-speed transmission dedicated
instruction
2.8.1 Instructions for Multiple CPU high-speed transmission
dedicated
Table 2.40 Multiple CPU high-speed transmission dedicated instruction
Category
Instruction Symbol
Symbol Processing Details
Execution
Condition
Number of Basic Steps
Subset
See for Description
Writing Devices
to Another CPU
D.DDWR
In multiple CPU system, data stored in a
device specified by host CPU ( ) or later is
stored by the number of write points specified
by ( +1) into a device specified by another
CPU (n) ( ) or later
10 -
10-13
DP.DDWR
10 -
Reading Devices
from Another
CPU
D.DDRD
In multiple CPU system, data stored in a
device specified by another CPU (n) ( ) or
lrater is stored by the number of read points
specified by ( +1) into a device specified by
host CPU ( ) or late
10 -
10-17
DP.DDRD
10 -
D2D1S2S1D.DDWR n
S2
D2
D1
D2D1S2S1 DP.DDWR n
D2D1S2S1D.DDRD n
D1
S1
S2
D2D1S2S1 DP.DDRD n

Mitsubishi MELSEC Q Series Specifications

General

Brand	Mitsubishi
Model	MELSEC Q Series
Category	Controller
Language	English