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MELSEC-Q
16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE PLC
SYSTEM
16.4 CPU Shared Memory
The CPU shared memory is for exchanging data between CPU modules, and consists
of 4,096 words between 0H and FFF
H
.
The CPU shared memory consists of four areas; the host PLC operation information
area, the system area, the automatic refresh area, and the user's free area.
An area consisting of the number of automatic refresh points from 800
H
is used as the
automatic refresh area when the automatic refresh of device data is set up.
The beginning of the user's free area starts from the address immediately after the end
of the automatic refresh area.
800
H
to 811
H
becomes the automatic refresh area if the number of automatic refresh
points is 18 (11
H
points,) and the area after 812
H
becomes the user's free area.
The configuration of the CPU shared memory and the necessity of accessing
sequence programs are shown in the illustration below.
Host PLC operation
information area
System area
Automatic refresh area
User's free area
CPU shared memory
0
H
1FF
H
to
200
H
7FF
H
to
800
H
FFF
H
to
Host PLC Other PLCs
Writing
Disable
Enable
Reading
Writing Reading
2
1
Disable Disable
Disable Disable Disable Disable
Disable Disable Disable Disable
Disable Disable
Enable
Enable
REMARK
1: Use the S. TO instruction to write the free user area of the host PLC from the
High Performance model QCPU.
The Motion CPU is not provided with an S. TO instruction, so that it cannot write
in the free user area of the host PLC.
For the writing method from the PC CPU module to the free user area of the
host PLC, refer to the manual of the PC CPU module.
2: To read from the High Performance model QCPU, use the FROM instruction or
intelligent function module device (U
\G ).
Because the Motion CPU is not provided with the FROM instruction or
intelligent function module device, data cannot be read from the Motion CPU.
For reading from the PC CPU module, refer to the manual of the PC CPU
module.
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