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Agilent Technologies 4263B User Manual

Agilent Technologies 4263B
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4263B
T
able 5-5.
Standard Event
Status
Register
Assignments
Bit
No
.
Bit
W
eight
Description
7 128 Power-On
Bit |
This bit
is set
when the
4263B has
been
turned
OFF
and
then ON
since the
last time
this register
was
read.
6 Always
0
(zero)
5 32 Command
Error
Bit
|
This
bit
is
set
if
the
following command
errors
occur
.
An
IEEE
488.2
syntax
error
occurred.
The
4263B
received
a
Group
Execute
Trigger
(GET)
inside
a program
message
.
4 16 Execution
Error
Bit
|
This
is
set
when
a
parameter
of
a
GPIB
command
was
outside
of
its
legal
input
range
or
was
otherwise
inconsistent
with
the
4263B
's
capabilities
.
3 8 Device-Dependent
Error
Bit |
This
bit
is
set
when
so
many
errors
have
occurred
that
the
error queue
is
full.
2 4 Query
Error
Bit
|
This
bit
is
set
when
reading
data
from
the
output
buer
and
no
data
was
present,
or
when
the
data
was
lost.
1 Always
(zero)
0 1 Operation
Complete
Bit
|
This
bit
is
set
when
the
4263B
has
completed
all
selected
pending
operations
before
sending
the
*OPC
command.
Standard
Operation
Status
Group
The
4263B
provides
two
Standard
Operation
Status
group
|
Operation
Status
Register
group
an
d
Questionable
Status
Register
group
|
which
can
be
accessed
using
the
ST
A
Tus subsystem
commands
.
(Refer
to
ST
A
Tus
subsystem
in
\GPIB
Commands".)
As
a
beginner
,
you will
rarely
need
to
use
this
group
.The
individual bit
assignment of
these registers
are
given
in
\Operation
Status
Register"
and
\Questionable
Status
Register"
later
in this
section.
Each
group
includes
a
condition
register
an
event register
, and
an enable
register
.
(Illustrated
in
Figure
5-5
.)
The
condition
register
reects
the
internal states
of the
4263B.
So each
time the
4263B's
condition
is
changed,
its
condition
bit
is
changed
from
\0" to
\1",
or
from
\1"
to
\0".
The event register's bits correspond to the register's bits
. A transition lter reports an event to
the event register
, when a condition register bit changes from \1" to \0" for all bits except for
bit no
. 8 and 9. F
or bit no's 8 and 9, when a condition register bit changes
from \0" to \1".
The enable register enable
the corresponding bit in the event register to set the status summary
bit, bit 7 or bit
3, of the Status Byte Register
.
5-42 GPIB Reference

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Agilent Technologies 4263B Specifications

General IconGeneral
BrandAgilent Technologies
Model4263B
CategoryMeasuring Instruments
LanguageEnglish

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