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Chenbro RM23712 User Manual

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RM23712 TPS
32
operation once in spec clock and data timing is again received. Note if the PSMC misses a clock
from the master due to noise or other bus errors, the device must continue to accept in spec clocks
and NACK. The PSMC is supposed to re-synch with the master on the next START or STOP
condition.
3.4.2.4 Write byte/word
The first byte of a Write Byte/Word access is the command code. The next one or two bytes,
respectively, are the data to be written. In this example the master asserts the slave device address
followed by the write bit. The device acknowledges and the master delivers the command code. The
slave again acknowledges before the master sends the data byte or word (low byte first). The slave
acknowledges each byte, and the entire transaction is finished with a STOP condition.
Figure 17.Write byte protocol with PEC
Figure 18.Write Word protocol with PEC
3.4.2.5 Read byte/word
Reading data is slightly more complicated than writing data. First the host must write a command to
the slave device. Then it must follow that command with a repeated START condition to denote a
read from that devices address. The slave then returns one or two bytes of data.
Note that there is no STOP condition before the repeated START condition, and that a NACK
signifies the end of the read transfer.
Figure 19.Read byte protocol with PEC
Figure 20.Read Word protocol with PEC

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Chenbro RM23712 Specifications

General IconGeneral
BrandChenbro
ModelRM23712
CategoryRacks & Stands
LanguageEnglish