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MELSEC-Q
7 FUNCTION
(e) The timing for external I/O enforced ON/OFF is shown in the table below.
Refresh area Input Output
I/O modules on the
base unit (X, Y)
• During END processing (input
refresh)
• During the execution of
commands that used direct
access input (DX) (LD, LDI, AND,
ANI, OR, ORI, LDP, LDF, ANDP,
ANDF, ORP, ORF)
• During END processing (output
refresh)
• During the execution of
commands that used direct
access output (DY) (OUT, SET,
DELTA, RST, PLS, PLF, FF, LDF,
MC)
I/O of High
Performance model
QCPU to be refreshed
from LX, LY of
MELSECNET/H
• During END processing (MELSECNET/H refresh)
• During execution of the COM command
• During execution of the ZCOM command
I/O of High
Performance model
QCPU to be refreshed
from RX, RY of CC-
Link
• During END processing (CC-Link refresh)
• During execution of the COM command
• During execution of the ZCOM command
(f) A total of thirty-two devices can be registered for enforced ON and OFF.
(g) Sequence program operations take precedence when used with an output
Y contact.
(h) The enforced ON, OFF and cancelled status (including those that are not
set up) can be confirmed with GX Developer. Confirmation is also allowed
with the MODE judgment LED when at least one device is registered. (the
MODE LED will flicker.)
(i) It is possible to register enforced ON/OFF for external I/O in the same CPU
module from multiple GX Developers connected to the network.
However, when enforced ON/OFF is registered in the same device from
multiple GX Developers, it will assume the most recent registered ON/OFF
status.
Owing to this, there are cases when the GX Developer executed first will
display different ON/OFF information to the CPU module ON/OFF information.
When performing enforced ON/OFF from multiple GX Developers, ensure
that the most up-to-date information is set with the "Load Registration
Status" switch before executing the enforced ON/OFF procedure.
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