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Texas Instruments LMK04828 User Manual

Texas Instruments LMK04828
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SYNC
SYNC
_POL
Pulser
D
VCO
_MUX
VCO1
VCO0
External VCO
SYNC
_MODE
SYSREF
DDLY
SYSREF
Divider
SYSREF
_MUX
SYNC/SYSREF
SYNC_
DISSYSREF
DDLY
(4 to 32)
Divider
(1 to 32)
Analog
DLY
DCC
Output
Buffer
SYNC_
DISX
Analog
DLY
Output
Buffer
Digital
DLY
VCO Frequency
SYSREF/SYNC
DCLKout0, 2, 4, 6, 8, 10, 12
SDCLKout1, 3, 5, 7, 9, 11, 13
CLKin1
SYSREF_PULSE_CNT
CLKin1
_OUT
_MUX
SPI Register: SYNC_EN
Must be set to enable any
SYNC/SYSREF functionality
SYNC_PLL1_DLD
PLL1_DLD
SYNC_PLL2_DLD
PLL2_DLD
PULSER MODE
CLKin0
CLKin0
_OUT
_MUX
SYSREF_CLR
OSCout
FB_MUX
OSCout
_MUX
PLL1
SYSREF_REQ_EN
Note: The SYNC/CLKin0 input is
reclocked to the Dist Path
OSCin
DCLKout6
DCLKout8
CLKin1
PLL1
FB_MUX
SYSREF_PLSR_PD
SYSREF_DDLY_PD
SYSREF_PD
Dist. Path
SPI Register
Legend
SYSREF/SYNC Clock
VCO/Distribution Clock
SYSREF
_CLKin0
_MUX
LMK04821
,
LMK04826
,
LMK04828
www.ti.com
SNAS605AR MARCH 2013REVISED DECEMBER 2015
Functional Block Diagram (continued)
Figure 13. SYNC/SYSREF Clocking Paths
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 35
Product Folder Links: LMK04821 LMK04826 LMK04828

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Texas Instruments LMK04828 Specifications

General IconGeneral
BrandTexas Instruments
ModelLMK04828
CategoryMotherboard
LanguageEnglish

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