Rockwell Automation Publication 2080-UM002N-EN-E - November 2022 221
Chapter 10 Use the High-Speed Counter and Programmable Limit Switch
Figure 21 - Interrupt Configuration Window
HSC Interrupt POU
This is the name of the Program Organizational Unit (POU) which is executed immediately
when this HSC Interrupt occurs. You can choose any pre-programmed POU from the drop-
down list.
The Auto Start is configured with the programming device and stored as part of the user
program. The auto start bit defines if the HSC interrupt function automatically starts whenever
the controller enters any run or test mode.
The MV (Overflow Mask) control bit is used to enable (allow) or disable (not allow) an overflow
interrupt from occurring. If this bit is clear (0), and an overflow reached condition is detected
by the HSC, the HSC user interrupt is not executed.
This bit is controlled by the user program and retains its value through a power cycle. It is up
to the user program to set and clear this bit.
The MN (Underflow Mask) control bit is used to enable (allow) or disable (not allow) a underflow
interrupt from occurring. If this bit is clear (0), and a Underflow Reached condition is detected
by the HSC, the HSC user interrupt is not executed.
This bit is controlled by the user program and retains its value through a power cycle. It is up
to the user program to set and clear this bit.
Auto Start (HSC0.AS)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see Count Down (HSCSTS.CountDownFlag) on page 211.
User Program Access
AS - Auto Start bit 0…9 read only
Mask for IV (HSC0.MV)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see Count Down (HSCSTS.CountDownFlag) on page 211.
User Program Access
MV - Overflow Mask bit 0…9 read only
Mask for IN (HSC0.MN)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see Count Down (HSCSTS.CountDownFlag) on page 211.
User Program Access
MN - Underflow Mask bit 2…9 read only
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