Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 49
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
10/100/1000 MHz Tri-Speed Ethernet PHY
[Figure 2-1, callout 12]
The ZCU102 board uses the TIDP83867IRPAP Ethernet RGMII PHY [Ref 18] at U98 for
Ethernet communications at 10 Mb/s, 100 Mb/s, or 1000 Mb/s. The board supports RGMII
mode only. The PHY connection to a user-provided Ethernet cable is through a Wurth
7499111221A RJ-45 connector (P12) with built-in magnetics.
The Ethernet connections from XCZU9EG MPSoC U1 to the DP83867IRPAP PHY device at
U98 are listed in Table 3-14.
Table 3-14: Ethernet Connections, XCZU9EG MPSoC to the PHY Device
XCZU9EG (U1)
Pin
Schematic Net Name
DP83867 PHY U98
Pin Name
A25
MIO64_ENET_TX_CLK
40
GTX_CLK
A26
MIO65_ENET_TX_D0
38
TX_DO
A27
MIO66_ENET_TX_D1
37
TX_D1
B25
MIO67_ENET_TX_D2
36
TX_D2
B26
MIO68_ENET_TX_D3
35
TX_D3
B27
MIO69_ENET_TX_CTRL
52
TX_EN_TX_CTRL
C26
MIO70_ENET_RX_CLK
43
RX_CLK
C27
MIO71_ENET_RX_D0
44
RX_DO
E25
MIO72_ENET_RX_D1
45
RX_D1
H24
MIO73_ENET_RX_D2
46
RX_D2
G25
MIO74_ENET_RX_D3
47
RX_D3
D25
MIO75_ENET_RX_CTRL
53
RX_DV_RX_CTRL
H25
MIO76_ENET_MDC
20
MDC
F25
MIO77_ENET_MDIO
21
MDIO
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Xilinx ZCU102 Specifications

General

Brand	Xilinx
Model	ZCU102
Category	Motherboard
Language	English