Xilinx ZCU102 User Manual

ZCU102 Evaluation Board User Guide www.xilinx.com 72
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
For more information about PMOD connector compatible PMOD modules, see [Ref 23].
Prototype Header
[Figure 2-1, callout 41]
The ZCU102 evaluation board provides a 2x12 male header prototype header J3 which
makes ten Bank 50 GPIO connections available. Figure 3-29 shows connector J3 with its
MPSoC (U1) Bank 50 connections.
Table 3-31: XCZU9EG U1 to PMOD Connections
XCZU9EG
(U1) Pin
Schematic Net
Name
I/O Standard PMOD Pin
A20
PMOD0_0 LVCMOS33
J55.1
B20
PMOD0_1 LVCMOS33
J55.3
A22
PMOD0_2 LVCMOS33
J55.5
A21
PMOD0_3 LVCMOS33
J55.7
B21
PMOD0_4 LVCMOS33
J55.2
C21
PMOD0_5 LVCMOS33
J55.4
C22
PMOD0_6 LVCMOS33
J55.6
D21
PMOD0_7 LVCMOS33
J55.8
D20
PMOD1_0 LVCMOS33
J87.1
E20
PMOD1_1 LVCMOS33
J87.3
D22
PMOD1_2 LVCMOS33
J87.5
E22
PMOD1_3 LVCMOS33
J87.7
F20
PMOD1_4 LVCMOS33
J87.2
G20
PMOD1_5 LVCMOS33
J87.4
J20
PMOD1_6 LVCMOS33
J87.6
J19
PMOD1_7 LVCMOS33
J77.8
Send Feedback

Xilinx ZCU102 Specifications

General

Brand	Xilinx
Model	ZCU102
Category	Motherboard
Language	English