130 Rockwell Automation Publication 750-PM001N-EN-P - February 2017
Chapter 3 Drive Port 0 Parameters
Drive (Port 0) Position
Control File
File
Group
No. Display Name
Full Name
Description
Values
Read-Write
Data Type
POSITION CONTROL
Position Cfg/Sts
720 PTP PsnRefStatus
Point-To-Point Position Reference Status
RO 16-bit
Integer
Displays the current operating status of the Point-To-Point Position Planner in the Position Referencing.
Bit 0 “ZeroFFSpdRef” – Indicates the speed feed forward reference P783 [PTP Speed FwdRef] is zero.
Bit 1 “Ref Complete” – Indicates the position point-to-point feedback P777 [PTP Feedback] reaches the position point-to-point reference P784 [PTP Command],
and the speed forward reference P783 [PTP Speed FwdRef] reaches zero.
Bit 2 “P2P Int Hold” – Indicates the position point-to-point planner integrator is holding. Read back of the point-to-point integral hold bit P770 [PTP Control] Bit 4
“Intgrtr Hold.”
Bit 3 “SpdFFRef En” – Indicates the speed feed forward reference P783 [PTP Speed FwdRef] is active.
721 Position Control
Position Control
RW 32-bit
Integer
Sets bits to enable various position control functions.
Bit 1 “Intgrtr En” – Enables integrator operation. Resetting it resets the integrator.
Bit 2 “Offset ReRef” – Permits changing the value of position offsets without changing actual position. The position offsets are the values that are selected by P820
[Psn Offset 1 Sel] and P822 [Psn Offset 2 Sel]. The default position offsets are P821 [Psn Offset 1] and P823 [Psn Offset 2].
Bit 3 “OffsetVel En” – Uses the offset velocity P824 [Psn Offset Vel] for the position offset integrator. Sets the offset integrator bit, P724 [Psn Reg Status] Bit 0
“OffsetIntgtr” when this bit is on.
Bit 4 “Zero Psn” – Puts P836 [Psn Actual] in absolute mode (no differential) with zero position offset. P836 [Psn Actual] sets the value of P847 [Psn Fdbk] - the
position P725 [Zero Position]. With Bit 4 “Zero Psn” disabled, P836 [Psn Actual] accumulates the difference in P847 [Psn Fdbk] at each position control scan. P836
[Psn Actual] and P847 [Psn Fdbk] are not always the same and therefore, P836 [Psn Actual] is reset. With Bit 4 “Zero Psn” set, P836 [Psn Actual] directly loads the
raw value of P847 after subtracting P725 [Zero Position].
Bit 5 “Intgrtr Hold” – Holds the position integrator in present state.
Bit 6 “PsnWtch1Arm” – Enables the position watch 1. Resetting this bit clears the position watch 1 detection P724 [Psn Reg Status] Bit 9 “PsnW1Detect.”
Bit 7 “PsnWatch1Dir” – Causes the position watch 1 output to be set when P746 [PsnWatch1 DtctIn] is greater than a set-point selected by the position watch 1
selection P745 [PsnWatch1 Select]. Resetting this bit causes the position watch 1 output to be set when P746 [PsnWatch1 DtctIn] is less than a set-point selected
by the position watch 1 selection P745 [PsnWatch1 Select].
Bit 8 “PsnWtch2Arm” – Enables the position watch 2. Resetting this bit clears the position watch 2 detection P724 [Psn Reg Status] Bit 10 “PsnW2Detect.”
Bit 9 “PsnWatch2Dir” – Causes the position watch 2 output to be set when P749 [PsnWatch2 DtctIn] is greater than a set-point selected by the position watch 2
selection P748 [PsnWatch2 DtctIn]. Resetting this bit causes the position watch 2 output to be set when P749 [PsnWatch2 DtctIn] is less than a set-point selected
by the position watch 2 selection P748 [PsnWatch2 DtctIn].
Bit 10 “Add Spd Ref” – Adds the speed reference to the output of the position control, when in position control mode.
Options
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
SpdFFRef En
PTP Int Hold
Ref Complete
ZeroFFSpdRef
Default0000000000000000
Bit 1514131211109876543210
0 = False
1 = True
Options
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Add Spd Ref
PsnWatch2Dir
(1)
PsnWtch2Arm
(1)
PsnWatch1Dir
(1)
PsnWtch1Arm
(1)
(1) 755 drives only.
Intgrtr Hold
Zero Psn
OffsetVel En
Offset ReRef
Intgrtr En
Reserved
Default00000000000000000000000000000000
Bit 313029282726252423222120191817161514131211109876543210
0 = Disabled
1 = Enabled