Publication 1747-RM001G-EN-P - November 2008
12-28 SLC Communication Instructions
With an SLC 5/02 MSG instruction, the ladder logic must reset the
Timeout Bit before triggering the MSG instruction.
• No Response Bit NR (bit 9) is set if the target processor responds to the
MSG instruction that it cannot process the message at the current time
(for DH-485 and DH+ protocols only). This means that the MSG
should be retried. The NR bit is reset the next time the MSG instruction
gets scanned. Do not set or reset this bit. It is informational only.
• Enabled and Waiting Bit EW (bit 10) is set after the enable bit is set and
the message is physically placed in one of the four available transmit
buffers. The EW bit is reset when either the ST or ER bit is set. Do not
set or reset this bit. It is informational only.
• Continuous Operation CO (bit 11)
(1)
Set this bit if you wish to
continually resend the MSG instruction. We recommend that internal
timeout control be used for this option and the rung be unconditionally
true. Use this bit to turn the mode on and off. A MSG instruction
occupies one of the four channel transmission buffers when its CO bit
is set. Therefore, a maximum of four MSG instructions per channel may
have their CO bit set.
This mode will continuously operate provided that the rung is
continually scanned. If the instruction errors prior to the MSG timeout,
it will automatically retry until it is successful. If the instruction errors
due to a MSG timeout, the MSG stops triggering. The EN bit must be
toggled off and back on to resume operation.
• Error Bit ER (bit 12) is set when message transmission has failed. The
ER bit is reset the next time the associated rung goes from false to true.
Do not set or reset this bit. It is informational only.
• Done Bit DN (bit 13) is set when the message is transmitted
successfully. The DN bit is reset the next time the associated rung goes
from false to true. Do not set or reset this bit. It is informational only.
TIP
When programming timeout control in SLC 5/03 and
higher processors, omit the Timeout Bit manual reset rung.
(1)
SLC 5/03 and higher processors only.
TIP
If your program contains four message instructions assigned
to the same channel with the Continuous Operation (CO)
bit set, no other message instructions can be executed out
that same channel, including message instructions which
may be in the fault routine.
To Next Page
Loading...
Need help?
General
