Data Organization and Addressing Capabilities
MOTOROLA
MC68030 USER’S MANUAL
2-15
2.4.10 Memory Indirect Preindexed Mode
In this mode, the operand and its address are in memory. The processor calculates an
intermediate indirect memory address using the base register (An), a base displacement
(bd), and the index operand (Xn.SIZE * SCALE). The processor accesses a long word at
this address and adds the outer displacement to yield the effective address. Both
displacements and the index register contents are sign-extended to 32 bits.
In the syntax for this mode, brackets enclose the values used to calculate the intermediate
memory address. All four user-specified values are optional. Both the base and outer
displacements may be null, word, or long word. When a displacement is omitted or an
element is suppressed, its value is taken as zero in the effective address calculation.
31 0
SIGN-EXTENDED VALUE
31 0
31 0
31 0
31 0
31 0
31 0
EFFECTIVE ADDRESS:
NUMBER OF EXTENSION WORDS: 1,2, 3, 4, OR 5
EA = (bd + An + Xn.SIZE*SCALE) + od
([bd,An,Xn.SIZE*SCALE],od)
110
An
GENERATION:
ASSEMBLER SYNTAX:
MODE:
ADDRESS REGISTER:
SCALE VALUE
OPERAND
+
7
+
BASE DISPLACEMENT:
INDEX REGISTER:
SCALE:
MEMORY ADDRESS
INDIRECT MEMORY ADDRESS
VALUE AT INDIRECT MEMORY ADDRESS
POINTS TO
SIGN-EXTENDED VALUE
SIGN-EXTENDED VALUE
+
X
OUTER DISPLACEMENT:
0
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