Data Organization and Addressing Capabilities
2-22 MC68030 USER’S MANUAL MOTOROLA
2.5 EFFECTIVE ADDRESS ENCODING SUMMARY
Most of the addressing modes use one of the three formats shown in Figure 2–4. The single
effective address instruction is in the format of the instruction word. The encoding of the
mode field of this word selects the addressing mode. The register field contains the general
register number or a value that selects the addressing mode when the mode field contains
"111.'' Table 2–2 shows the encoding of these fields. Some indexed or indirect modes use
the instruction word followed by the brief format extension word. Other indexed or indirect
modes consist of the instruction word and the full format of extension words. The longest
instruction for the MC68030 contains 10 extension words. It is a MOVE instruction with full
format extension words for both source and destination effective addresses and with 32-bit
base displacements and 32-bit outer displacements for both addresses. However,
coprocessor instructions can have any number of extension words. Refer to the coprocessor
instruction formats in Section 10 Coprocessor Interface Description.
For effective addresses that use the full format, the index suppress (IS) bit and the index/
indirect selection (I/IS) field determine the type of indexing and indirection. Table 2–1 lists
the indexing and indirection operations corresponding to all combinations of IS and I/IS
values.
Table 2-1. IS–I/IS Memory Indirection Encodings
IS Index/Indirect Operation
0 000 No Memory Indirection
0 001 Indirect Preindexed with Null Outer Displacement
0 010 Indirect Preindexed with Word Outer Displacement
0 011 Indirect Preindexed with Long Outer Displacement
0 100 Reserved
0 101 Indirect Postindexed with Mull Outer Displacement
0 110 Indirect Postindexed with Word Outer Displacement
0 111 Indirect Postindexed with Long Outer Displacement
1 000 No Memory Indirection
1 001 Memory Indirect with Mull Outer Displacement
1 010 Memory Indirect with Word Outer Displacement
1 011 Memory Indirect with Long Outer Displacement
1 100–111 Reserved
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