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Xilinx 7 Series User Manual

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7 Series FPGAs GTP Transceivers User Guide www.xilinx.com 189
UG482 (v1.9) December 19, 2016
RX Elastic Buffer
Using the RX Elastic Buffer
These settings are used to enable the RX elastic buffer to resolve phase differences between the
XCLK and RXUSRCLK domains:
RXBUF_EN = TRUE
RX_XCLK_SEL = RXREC
RXBUF_RESET_ON_EIDLE String GTP transceiver internally generated RX elastic buffer reset on
electrical idle.
TRUE: Enables auto reset of RX elastic buffer during an optional
reset sequence of an electrical idle state as used in PCI Express
operation.
FALSE: Disables auto RX elastic buffer reset on electrical idle.
This should be the default setting.
Note: For channels with large attenuation (lossy channels typically
exceeding 15 dB at Nyquist), it is recommended that
RXBUF_RESET_ON_EIDLE should be set to FALSE because fast
transitioning data patterns like the 101010 sequence in
CJPAT/CJTPAT can accidentally trigger an electrical idle.
RXBUF_RESET_ON_RATE_CHANGE String GTP transceiver internally generated RX elastic buffer reset on rate
change.
TRUE: Enables auto RX elastic buffer reset on rate change.
FALSE: Disables auto RX elastic buffer reset on rate change.
RXBUF_THRESH_OVRD String RX elastic buffer threshold override.
TRUE: Use the RXBUF_THRESH_OVFLW and
RXBUF_THRESH_UNDFLW attributes to set the RX elastic
buffer overflow and underflow thresholds, respectively.
FALSE: Automatically calculates the RX elastic buffer overflow
and underflow thresholds. This is the recommended default
setting.
RXBUF_THRESH_OVFLW Integer RX elastic buffer overflow threshold specified as the number of
bytes. If the data latency through the RX elastic buffer is at or above
this threshold, the buffer is considered to be in an overflow
condition. Used when RXBUF_THRESH_OVRD = TRUE.
Reserved. The recommended value from the 7 Series FPGAs
Transceivers Wizard should be used.
RXBUF_THRESH_UNDFLW Integer RX elastic buffer underflow threshold specified as number of bytes.
If the data latency through the RX elastic buffer is at or below this
threshold, the buffer is consider to be in underflow condition. Used
when RXBUF_THRESH_OVRD = TRUE.
Reserved. The recommended value from the 7 Series FPGAs
Transceivers Wizard should be used.
RXBUFRESET_TIME 5-bit Binary RX elastic buffer reset time.
Reserved. The recommended value from the 7 Series FPGAs
Transceivers Wizard should be used.
Table 4-34: RX Buffer Attributes (Cont’d)
Attribute Type Description
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Xilinx 7 Series Specifications

General IconGeneral
BrandXilinx
Model7 Series
CategoryComputer Hardware
LanguageEnglish

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