Xilinx 7 Series User Manual

7 Series FPGAs GTP Transceivers User Guide www.xilinx.com 123
UG482 (v1.9) December 19, 2016
TX Out-of-Band Signaling
Note: Figure 3-23 shows the sequence of events for the receiver present case and is not drawn to
scale.
Notes relevant to Figure 3-23:
1. Ensure that the GTP transceiver has successfully entered the P1 power state with [TX/RX]PD
= 2'd2 before receiver detection is performed by asserting TXDETECTRX.
2. Wait for PHYSTATUS = 1'd1 to read RXSTATUS on the same PCLK cycle. In PCI Express
mode, PCLK is [TX/RX]USRCLK. If RXSTATUS = 3'd3, then the receiver is present. If
RXSTATUS = 3'd0, then the receiver is not present. Deassert TXDETECTRX to exit receiver
detection.
TX Out-of-Band Signaling
Functional Description
Each GTP transceiver provides support for generating the out-of-band (OOB) sequences described
in the Serial ATA (SATA), Serial Attach SCSI (SAS) specification, and beaconing described in the
PCI Express specification.
Ports and Attributes
Table 3-32 shows the OOB signaling related ports.
X-Ref Target - Figure 3-23
Figure 3-23: PCI Express Receiver Detection
CLK
[TX/RX]PD
TXDETECTRX
PHYSTATUS
RXSTATUS
2’d2
3’d0 3’d3 3’d0
UG482_c3_22_110911
Table 3-32: TX OOB Signaling Ports
Port Dir Clock Domain Description
TXCOMFINISH Out TXUSRCLK2 Indicates completion of transmission of
the last SAS or SATA COM beacon.
TXCOMINIT In TXUSRCLK2 Initiates transmission of the COMINIT
sequence for SATA/SAS.
TXCOMSAS In TXUSRCLK2 Initiates transmission of the COMSAS
sequence for SAS.
TXCOMWAKE In TXUSRCLK2 Initiates transmission of the COMWAKE
sequence for SATA/SAS.
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Xilinx 7 Series Specifications

General

Brand	Xilinx
Model	7 Series
Category	Computer Hardware
Language	English