Xilinx Virtex-4 User Manual

Embedded Tri-Mode Ethernet MAC User Guide www.xilinx.com 113
UG074 (v2.2) February 22, 2010
10/100/1000 RGMII
R
10/100/1000 RGMII
RGMII, an alternative to GMII, was defined by Hewlett-Packard. It reduces the number of
pins required to connect the Ethernet MAC to the PHY from 24 to 12. RGMII achieves this
50% pin count reduction in the interface by using double data rate (DDR) flip-flops.
For more information on RGMII, refer to the Hewlett-Packard RGMII Specification, version 1.3
and 2.0.
1 Gb/s RGMII Interface
Figure 4-11 shows the Ethernet MAC configured with RGMII as the physical interface. In
this interface, not all the ports of the Ethernet MAC are used.
GMII_COL_# Input Collision detect control signal from PHY, only if tri-mode is selected.
GMII_RX_CLK_# Input Recovered clock from data stream by PHY.
GMII_RXD[7:0]_# Input Receive data from PHY.
GMII_RX_DV_# Input Receive data valid control signal from PHY.
GMII_RX_ER_# Input Receive data error signal from PHY.
Table 4-2: GMII Interface Signals (Cont’d)
Signal Direction Description
www.BDTIC.com/XILINX

Xilinx Virtex-4 Specifications

General

Brand	Xilinx
Model	Virtex-4
Category	Motherboard
Language	English