Xilinx Virtex-4 User Manual

Embedded Tri-Mode Ethernet MAC User Guide www.xilinx.com 129
UG074 (v2.2) February 22, 2010
10/100/1000 Serial Gigabit Media Independent Interface (SGMII)
R
MGT Logic Using the MGT RX Elastic Buffer
Figure 4-23 shows the Ethernet MAC configured with SGMII as the physical interface.
Connections to the RocketIO transceiver are illustrated.
These connections and the shim are created by the CORE Generator tool when the physical
interface is selected to be either SGMII or 1000BASE-X PCS/PMA. By using the CORE
Generator tool, the time required to instantiate the Ethernet MAC into a usable design is
greatly reduced.
Figure 4-22: Ethernet MAC Configured in SGMII Mode
Ethernet MAC
(PCS/PMA Sublayer)
MGTCLK_P
RXP_#
RXN_#
TXP_#
TXN_#
UG194_6_29_103106
EMAC#PHYPOWERDOWN
EMAC#PHYTXCHARDISPMODE
EMAC#PHYTXCHARDISPVAL
EMAC#PHYTXCHARISK
EMAC#PHYTXD[7:0]
EMAC#PHYLOOPBACKMSB
PHYEMAC#COL
EMAC#PHYSYNCACQSTAT US
PHYEMAC#RXBUFSTAT US[0]
PHYEMAC#RXBUFFERR
PHYEMAC#RXCHARISCOMMA
PHYEMAC#RXCHARISK
PHYEMAC#RXCHECKINGCRC
PHYEMAC#RXBUFSTAT US[1]
PHYEMAC#RXCOMMADET
PHYEMAC#RXLOSSOFSYNC[1:0]
PHYEMAC#DISPERR
PHYEMAC#RXD[7:0]
PHYEMAC#RXNOTINTABLE
PHYEMAC#RXRUNDISP
PHYEMAC#TXBUFERR
Status
Only
GND
PHYEMAC#RXCLKCORCNT[2:0]
Shim
GT11 Transceiver
TXPOWERDOWN#
TXDATA#[7:0]
LOOPBACK#[0]
RXRESET
TXRESET
TXCHARISK#[0]
TXBUFSTATU S#[1]
TXCHARDISPMODE#[0]
TXCHARDISPVAL#[0]
RXDATA#[7:0]
RXSTAT US
RXRUNDISP#[0]
RXCHARISK#[0]
TXRUNDISP#[0]
RXCHARISCOMMA#[0]
RXBUFERR
RXDISPERR#[0]
RXNOTINABLE#[0]
MGTCLK_N
Reset
State
Machine
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Xilinx Virtex-4 Specifications

General

Brand	Xilinx
Model	Virtex-4
Category	Motherboard
Language	English