Xilinx Virtex-4 User Manual

92 www.xilinx.com Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
Chapter 3: Client, Host, and MDIO Interfaces
R
0x390 E0_GENERALCONFIG
Promiscuous mode, 0x00000000 bits
[31:0].
0x390 R/W
0x394:0x39F Reserved. - -
0x3A0 IRSTATUS Access done, interrupt request status. 0x3A0 R/W
0x3A4 IRENABLE Interrupt request enable. 0x3A4 R/W
0x3A8:0x3AF Reserved.
0x3B0 MIIMWRDATA MDIO write data. 0x3B0 R/W
0x3B4 MIIMCNTL
Decode address for MDIO
address output.
0x3B4 W
0x3B8:0x5FF Reserved. - -
EMAC1 Registers
0x600 E1_RXCONFIGW0 Receiver configuration word 0. 0x600 R/W
0x640 E1_RXCONFIGW1 Receiver configuration word 1. 0x640 R/W
0x680 E1_TXCONFIG Transmitter configuration. 0x680 R/W
0x6C0 E1_FLOWCONTROL Flow control configuration. 0x6C0 R/W
0x700 E1_EMACCONFIG Ethernet MAC configuration. 0x700 R/W
0x720 E1_RGMII_SGMII RGMII/SGMII configuration. 0x720 R
0x740 E1_MGMTCONFIG Management configuration. 0x740 R/W
0x780 E1_UNICASTADDRW0 Unicast address [31:0]. 0x780 R/W
0x784 E1_UNICASTADDRW1 0x0000, Unicast Address [47:32]. 0x784 R/W
0x788 E1_ADDRTABLECONFIGW0 Multicast address data[31:0] 0x788 R/W
0x78C E1_ADDRTABLECONFIGW1
0x00, RNW,
00000, ADDR[1:0],
Multicast address data[47:32].
0x78C R/W
0x790 E1_GENERALCONFIG
Promiscuous mode, 0x00000000 bits
[31:0].
0x790 R/W
0x7A0
IRSTATUS Access done, interrupt request status. 0x7A0 R/W
0x7A
4 IRENABLE Interrupt request enable. 0x7A4 R/W
0x7A8:0x7AF Reserved.
0x7B0 MIIMWRDATA MDIO write data. 0x7B0 R/W
0x7B4 MIIMCNTL
Decode address for MDIO
address output.
0x7B4 W
0x7B8:0x7FF Reserved. - -
Table 3-30: Detailed Address Codes for DCR Host Bus Access (Cont’d)
Address
Codes
Register Names Description
Ethernet MAC
Register Address
R/W
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Xilinx Virtex-4 Specifications

General

Brand	Xilinx
Model	Virtex-4
Category	Motherboard
Language	English