Intel 386 User Manual

Intel386™ EX EMBEDDED PROCESSOR USER’S MANUAL
10-14
Figure 10-12. Mode 3 – Basic Operation (Odd Count)
NOTE
For an even count of N, OUTn remains high for N/2 counts and low for N/2
counts (provided GATEn remains high). For an odd count of N, OUTn remains
high for (N + 1)/2 counts and low for (N – 1)/2 counts (provided GATEn
remains high).
Figure 10-13 shows suspending the counting sequence. A low level on GATEn causes the counter
to drive OUTn active (When OUTn is low, a falling edge on GATEn causes OUTn to be driven
high immediately) and suspend counting. A rising edge on the GATEn causes the counter to be
reloaded with the count. A high level on GATEn resumes counting.
Figure 10-13. Mode 3 – Disabling the Count
A2400-01
? ? ? ? 0004 0002 0000 0004 0002 0004 0002 0000
Writes to
Counter
n
CLKIN n
GATE n
OUT n
Control
Word = 16H
Count
0004 0002
Count = 5
? ? ? ? 0004 0002 0004 0002 0002 0002 0004 0002
Writes to
Counter
n
CLKIN n
GATE n
OUT n
Control
Word = 16H
Count
0004 0002
Count = 4
A2401-02

Intel 386 Specifications

General

Architecture	x86
Clock Speed	12 MHz to 40 MHz
Transistor Count	275, 000
Data Bus Width	32-bit
Address Bus Width	32-bit
Instruction Set	x86
Introduced	1985
Maximum Memory	4 GB
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
MMU	Yes
Voltage	5V
Model	Intel 386
Package	PGA
Process	1.5 μm to 1 μm