12 www.xilinx.com 7 Series FPGAs GTP Transceivers User Guide
UG482 (v1.9) December 19, 2016
Chapter 1: Transceiver and Tool Overview
The GTP transceiver offers a data rate range and features that allow physical layer support for
various protocols including:
• PCI Express, Revision 1.1/2.0
• Interlaken
• 10 Gb Attachment Unit Interface (XAUI), Reduced Pin eXtended Attachment Unit Interface
(RXAUI)
• Common Packet Radio Interface (CPRI™)/Open Base Station Architecture Initiative (OBSAI)
•OC-48
•OTU-1
• Serial RapidIO (SRIO)
• Serial Advanced Technology Attachment (SATA)/Serial Attached SCSI (SAS)
• Serial Digital Interface (SDI)
The CORE Generator™ tool includes a wizard to automatically generate predefined settings to
configure GTP transceivers to support configurations for different protocols. The wizard can also be
used to create custom configurations. For a complete list of protocols and electrical specifications
enabled through predefined settings, please refer to PG168
, 7 Series FPGAs Transceivers Wizard
LogiCORE IP Product Guide.
In comparison to prior generation transceivers in Spartan®-6 FPGAs, the GTP transceiver in the 7
series FPGAs has the following new or enhanced features:
• 2-byte internal datapath
• Two ring oscillator PLLs per Quad
• Power-efficient, adaptive continuous time linear equalizer (CTLE)
• RX margin analysis feature to provide non-destructive, 2-D post-equalization eye scan.
The first-time user is recommended to read High-Speed Serial I/O Made Simple [Ref 1], which
discusses high-speed serial transceiver technology and its applications.
Figure 1-1, page 13 shows the GTP transceiver placement in an example Artix™-7 device
(XC7A100T). This device has 8 GTP transceivers.
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