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HP 5384A Service Manual

HP 5384A
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HP
5384A and HP 5385A
Service
is
powered
by
Q1. Q1
is
used
as
a switch and
is
controlled
by an active
low
level
from
the
micro-
computer.
CR1
is
used
to
protect
Q1
from
voltage
spikes generated by
the
collapsing
magnetic
field
around
the
winding
of
K1.
8-172. _ The
limiter
circuit
CR2 and CR3
together
with
R2, R3,
R4
and
C2
form
an
input
protection
circuit.
8-173. The high
input
impedence
is
converted
to
a
low
impede
nee by
Q2
and
Q3
connected
together
as
a
unity
gain
buffer.
8-174. A
100kHz
low
pass
filter
(lPF) can be inserted
into
the
signal path
between
the
output
of
the
impedence
converter
and
the
input
of
the
first gain
stage U3A. The
filter
is
a single
pole
filter
with
series
resistor
R10
and
shunt
capacitor
C8
connected
to
ground
through
QS.
The
filter
is
turned
off
by
applying
a
TTL
low
signal
from
the
microcomputer
to
the
base
of
QS.
QS turns
off
causing
the
collector
to
go
high
which
turns
on
Q4.
When
Q4turns
on,
an
ac
path
through
C6
and
Q4
is
created.
8-175. The first gain stage U3A
is
a
differential
line
receiver
with
the
signal
applied
to
pin
10.
A manually
adjustable de bias voltage
(controlled
by
MANUAl
TRIG
A/MANUAl
ATTN
B,
R1)
or
a preset bias level
(set
by
R43)
is
applied
to
the
other
input
(pin
9).
At
power-up,
the
preset bias level
is
on
the
input
at
pin
9.
To
switch
to
manual
adjustment
and activate
the
front
panel
MANUAl
TRIG
A/MANUAl
ATTN B
control,
a
TTl
high
is
placed
on
pins 9, 10, and
11
of
analog
switch U16. The
TTl
low,
labeled
"AGC"
on
the
schematic,
is
generated
by
the
microcomputer
when
the
MAN
lEVEl
key
on
the
front
panel
is
pressed.
8-176. The first gain stage U3A
is
connected
to
U3B
as
a
differential
amplifier.
U3C
is
a Schmitt
trigger
with
the
positive feedback
provided
by
R18B.
C11
and C12
provide
frequency
peaking
to
compensate
for
the
roll
off
caused by
the
input
buffer.
Transistor array U6B
is
connected
as
a
differential
amplifier
to
drive
the
A
channel
input
of
the
MRC
(U1).
8-177. HP 5384A Channel B
8-178. A signal
is
applied
through
the
input
con-
nector
J2
and de
blocking
capacitor C14 and
through
C19
to
pin
13
of
U4B. Signal
attenuation
is
achieved
either
manually
or
through
an
automatic
gain
circuit
(AGC).
8-24
8-179. Signal
attenuation
through
AGC
is
activated
by
the
microcomputer
outputting
a
high
on
pin
9,
10,
and
11
of
the
analog switch U16
(MAN
lEVEl
key
is
turned
off). The high on U16 pins
9,
10, and
11
causes
R22
to
be
connected
to
the
base
of
Q7.
Q7
turns
on,
grounding
the
anode
side
of
the
PIN
diode
CRS,
thereby
removing
manual
control
of
input
attenu-
ation. The PIN
diode
CRS,
has
a
high
impedence
at
low
current
levels
so
small signals
pass
through
C19
to
pin
13
of
U4B
unattenuated.
However,
as
the
input
signal increases,
attenuation
begins
with
Schottky
diode
CR41imiting
the
positive half
of
the
input
signal
to
approximately
.6 volts.
As
the
input
signal becomes
larger,
the
average de level becomes
more
negative.
The negative
potential
is
also present at
the
cathode
of
PIN
CRS.
Since PIN
diode
CRS
cannot
switch
as
fast
as
CR4,
CRS
responds
to
the
negative de
by
func-
tioning
as
a resistor.
CRS
conducts
more
current
as
the
de
potential
across
the
diode
increases.
With
increased
current
through
CRS,
the
resistance
of
CRS
decreases,
forming
a signal voltage
divider
with
R25.
The resistance
of
the
PIN
diode
is
a
function
of
its
forward
current
and
will
be
approximately
10
ohms
with
a
5V
rms
input
signal. This causes an
attenuation
of
about
15
dB.
8-180.
When
manual
control
of
attenuation
is
de-
sired,
the
MAN
lEVEl
key
is
pressed
which
gives
instructions
to
the
microcomputer.
The
microcom-
puter
responds by placing a
low
on
the
AGC
line
to
pins
9,
10, and
11
on
Lh6. U16 connects a
ground
to
the
base
of
Q7
which
is
then
is
turned
off.
With
Q7
turned
off,
current
from
the
emitter
follower
Q6
flows
through
CRS
to
control
the
resistance
of
CRS.
The
front
panel
control
R1
(MANUAl
ATTN
lEVEl
B)
varies
the
voltage
on
the
base
of
Q6
which
in
turn
varies
the
current
through
CRS
from
0
to
about
10
mA.
CRS,
CR6 and CR7 serve
as
an
input
protection
network.
8-181.
After
attenuation,
the
input
signal
is
applied
to
pin
13
of
U4B, a
differential
line
receiver. The
other
input,
pin
12,
is
connected
to
an offset
adjustment,
R32
which
is
used
to
maximize
gain
by
centering
the
negative
of
positive
going
pulses
in
the
center
of
the
amplification
range
of
U4b. The
next
gain stage, U4A
is
configured
with
negative feedback
through
R40.
C15
is
used
for
high
frequency
peaking. A dual master
slave
flip
flop
(US)
is
connected
as
a
divide-by-four
frequency
divider.
The first
divider
also acts
as
a
Schmitt
trigger
and
provides
some gain. Transistor
array U6A
is
connected
as
a level
shifter
to
drive
the
B
channel
input
of
the
MRC.
•
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HP 5384A Specifications

General IconGeneral
BrandHP
Model5384A
CategoryCash Counter
LanguageEnglish

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