5486AdvTech.fm Draft Document for Review October 18, 2004
18 IBM Eserver i5 and iSeries System Handbook
have migrated to these powerful systems is a testimony to the fundamental
strength of the server’s architecture.
The following figure shows this change of hardware processor technology and
previews what is planned in future generations.
The summary charts in “Summary of today’s iSeries” on page 81 indicate the
processor technology used in each Eserver i5 and iSeries server.
Microprocessor excellence
Multithreading
Multithreading minimizes the processor wait or idle time. In general,
multithreading allows a single processor to process multiple threads in a different
fashion than a single processor without this capability. There are several distinct
differences between different types of multithreading implemented in the industry.
We restrict our discussion to IBM technologies only.
Testing indicates significant performance improvement over the multi-threading
algorithm used in the hardware multithreading (HMT) of the SSTAR technology
processors. Internal laboratory testing indicates that commercial applications see
a 25% to 35% throughput improvement compared to no multithreading
implementation and approximately 10% for HMT (controlled by the settings of the
QPRCMLTTSK system value). The 130 nanometer (nm) chip circuit technology is
used.
2004+
2000/2001
1998/1999
12-way A50 PPC
24-way A60 / A70 PPC Copper and SOI Sstar Istar Pulsar
6
4
B
I
T
6
4
B
I
T
1997
1996
12-way A35
X 2.87
X 4.59
X 1.94
X 3.6
2002
Giga 1.3 GHz 32-way POWER4 Copper and SOI
X1.85
X37.4
POWER
Giga (2000+ MHz) POWER5
Applications
OS/400
T I M I
Hardware
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