Xilinx VCK190 Series User Manual

• PL FMCP HSCP (FMC+) connecvity
○ XPIO triplet 3 (banks 706, 707, 708)
○ FMCP1 HSCP full LA[00:33] bus
○ FMCP2 HSCP full LA[00:33] bus
• PL GPIO connecons
○ PL UART1 to FTDI
○ PL GPIO DIP switch (4-posion)
○ PL GPIO pushbuons (two)
○ PL GPIO LEDs (four)
○ PL GPIO DC conguraon header
○ PL SYSCTLR_GPIO[0:5]
• 44 PL GTY transceivers (11 quads)
○ PCIe 8-lane edge connector (8, banks GTY103, GTY104)
○ HSDP USB3.1 TYPE C (1, bank GTY105)
○ zSFP28 (2, bank GTY105)
○ HDMI (3, bank GTY106)
○ HDMI TX only, RX not used (1, bank GTY106)
○ zQSFP28 (4, bank GTY200)
○ FMCP1 HSCP DP (12, banks GTY201-GTY203)
○ FMCP2 HSCP DP (12, banks GTY204-GTY206)
○ Not used (1, bank GTY105)
• PCI Express endpoint connecvity
○ Gen1 8-lane (x8)
○ Gen2 8-lane (x8)
○ Gen3 8-lane (x8)
○ Gen4 8-lane (x8)
• PS PMC MIO connecvity
○ PS MIO[0:12]: boot conguraon header
- DC QSPI support
Chapter 1: Introduction
UG1366 (v1.0) January 7, 2021 www.xilinx.com
VCK190 Board User Guide 10
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Xilinx VCK190 Series Specifications

General

Brand	Xilinx
Model	VCK190 Series
Category	Motherboard
Language	English