Xilinx VCK190 Series User Manual

Block Diagram
The VCK190 block diagram is shown in the following gure.
Figure 2: Block Diagram
GTY0
GTY1
GTY2
GTY3
GTY
Bank 106
GTY0
GTY1
GTY2
GTY3
GTY
Bank 105
GTY0
GTY1
GTY2
GTY3
GTY
Bank 104
GTY0
GTY1
GTY2
GTY3
GTY
Bank 103
CPM
PMC_MI0[0:25] Bank 500
PMC_MI0[26:51] Bank 501
LP_MI0[0:25] Bank 502
XPIO
Triplet 1
XPIO
Triplet 2
XPIO
Triplet 3
XPIO
Triplet 4
GTY0
GTY1
GTY2
GTY3
GTY
Bank 206
GTY0
GTY1
GTY2
GTY3
GTY
Bank 205
GTY0
GTY1
GTY2
GTY3
GTY
Bank 204
GTY0
GTY1
GTY2
GTY3
GTY
Bank 203
GTY0
GTY1
GTY2
GTY3
GTY
Bank 202
GTY0
GTY1
GTY2
GTY3
GTY
Bank 201
GTY0
GTY1
GTY2
GTY3
GTY
Bank 200
MRMAC
MRMAC
MRMAC
MRMAC
HDMI
HSDP
2x zSFP
Lane 4
Lane 5
Lane 6
Lane 7
PCIe
GEN4
x8
Lane 0
Lane 1
Lane 2
Lane 3
MIO
HDIO
SysC, GPIO
1.8V
HDIO
HDMI, PCIe
3.3V
Versal VC1902
VSVA2197
700 701 702 703 704 705 706 707 708 709 710 711
DDR4 72-bit
UDIMM
LPDDR4
2x (1x32)
LPDDR4
2x (1x32)
FMC+_01 FMC+_02
zQSFP
4
4
4
4
4
4
4
12
12
X23196-121620
Chapter 1: Introduction
UG1366 (v1.0) January 7, 2021 www.xilinx.com
VCK190 Board User Guide 8
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Xilinx VCK190 Series Specifications

General

Brand	Xilinx
Model	VCK190 Series
Category	Motherboard
Language	English