Figure 188: Status byte and service request (SRQ)
The bits of the Status Byte Register are described as follows:
• Bit B0, Measurement Summary Bit (MSB): Set summary bit indicates that an enabled
measurement event has occurred.
• Bit B1, System Summary Bit (SSB): Set summary bit indicates that an enabled system event
has occurred.
• Bit B2, Error Available (EAV): Set bit indicates that an error or status message is present in the
error queue.
• Bit B3, Questionable Summary Bit (QSB): Set summary bit indicates that an enabled
questionable event has occurred.
• Bit B4, Message Available (MAV): Set bit indicates that a response message is present in the
output queue.
• Bit B5, Event Summary Bit (ESB): Set summary bit indicates that an enabled standard event
has occurred.
• Bit B6, Request Service (RQS)/Master Summary Status (MSS): Set bit indicates that an
enabled summary bit of the Status Byte Register is set. Depending on how it is used, bit B6 of the
Status Byte Register is either the Request for Service (RQS) bit or the Master Summary Status
(MSS) bit:
â–ª When using the GPIB, USB, or VXI-11 serial poll sequence of the Series 3700A to obtain the
status byte (serial poll byte), B6 is the RQS bit. See Serial polling and SRQ (on page C-18)
for details on using the serial poll sequence.
â–ª When using the *STB? common command or status.condition Status byte and service
request commands (on page C-19) to read the status byte, B6 is the MSS bit.
• Bit B7, Operation Summary (OSB): Set summary bit indicates that an enabled operation event
has occurred.
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