13-2 Status Structure
Overview
Model 6514 provides a series of status registers and queues allowing the operator to monitor
and manipulate the various instrument events. The status structure is shown in Figure 13-1. The
heart of the status structure is the status byte register. This register can be read by the users test
program to determine if a service request (SRQ) has occurred, and what event caused it.
Status byte and SRQ — The status byte register receives the summary bits of four status reg-
ister sets and two queues. The register sets and queues monitor the various instrument events.
When an enabled event occurs, it sets a summary bit in the status byte register. When a summary
bit of the status byte is set and its corresponding enable bit is set (as programmed by the user),
the RQS/MSS bit will set to indicate that an SRQ has occurred.
Status register sets — A typical status register set is made up of a condition register, an event
register and an event enable register. A condition register is a read-only register that constantly
updates to reflect the present operating conditions of the instrument.
When an event occurs, the appropriate event register bit sets to 1. The bit remains latched to
1 until the register is reset. When an event register bit is set and its corresponding enable bit is
set (as programmed by the user), the output (summary) of the register will set to 1, which in turn
sets the summary bit of the status byte register.
Queues — Model 6514 uses an output queue and an error queue. The response messages to
query commands are placed in the output queue. As various programming errors and status mes-
sages occur, they are placed in the error queue. When a queue contains data, it sets the appropri-
ate summary bit of the status byte register.
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