IEEE-488 Reference
5-112
10 OUTPUT 707; “:stat:oper:cond?”
20 ENTER 707; A$
30 PRINT A$
40 END
Line 10 Queries the Operation Condition Register.
Line 20 Addresses the 7001 to talk.
Line 30 Displays the decimal value that defines which bits in the register are set.
:PREset
:STATus:PREset Return 7001 to default conditions
:stat:pres
When this command is sent, the SCPI event registers are affected as follows:
1. All bits of the positive transition filter registers are set to one (1).
2. All bits of the negative transition filter registers are cleared to zero (0).
3. All bits of the following registers are cleared to zero (0):
A. Operation Event Enable Register.
B. Questionable Event Enable Register.
4. All bits of the following registers are set to one (1):
A. Trigger Event Enable Register.
B. Arm Event Enable Register.
C. Sequence Event Enable Register.
Note: Registers not included in the above list are not affected by this command.
The following programming example demonstrates how to use the :PRESet command of the
STATus subsystem:
OUTPUT 707; “:stat:pres”
Programming
example
5.16.5
Short-form
format
Description
Programming
example
:STATus Subsystem
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