Motorola MC68HC908AB32 User Manual

Timer Interface Module A (TIMA)
Technical Data MC68HC908AB32 — Rev. 1.0
186 Timer Interface Module A (TIMA) MOTOROLA
PS[2:0] — Prescaler Select Bits
These read/write bits select either the PTD6/TACLK pin or one of the
seven prescaler outputs as the input to the TIMA counter as
Table 11-2 shows. Reset clears the PS[2:0] bits.
11.10.2 TIMA Counter Registers
The two read-only TIMA counter registers contain the high and low bytes
of the value in the TIMA counter. Reading the high byte (TACNTH)
latches the contents of the low byte (TACNTL) into a buffer. Subsequent
reads of TACNTH do not affect the latched TACNTL value until TACNTL
is read. Reset clears the TIMA counter registers. Setting the TIMA reset
bit (TRST) also clears the TIMA counter registers.
NOTE: If you read TACNTH during a break interrupt, be sure to unlatch
TACNTL by reading TACNTL before exiting the break interrupt.
Otherwise, TACNTL retains the value latched during the break.
Table 11-2. Prescaler Selection
PS2 PS1 PS0 TIM Clock Source
0 0 0 Internal Bus Clock ÷1
0 0 1 Internal Bus Clock ÷ 2
0 1 0 Internal Bus Clock ÷ 4
0 1 1 Internal Bus Clock ÷ 8
1 0 0 Internal Bus Clock ÷ 16
1 0 1 Internal Bus Clock ÷ 32
1 1 0 Internal Bus Clock ÷ 64
1 1 1 PTD6/TACLK
Address: $0022
Bit 7 654321Bit 0
Read: Bit 15 14 13 12 11 10 9 Bit 8
Write:
Reset: 00000000
= Unimplemented
Figure 11-5. TIMA Counter Register High (TACNTH)

Motorola MC68HC908AB32 Specifications

General

Brand	Motorola
Model	MC68HC908AB32
Category	Controller
Language	English