External Interrupt (IRQ)
Functional Description
MC68HC908AB32 — Rev. 1.0 Technical Data
MOTOROLA External Interrupt (IRQ) 341
NOTE:
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests. (See 8.6
Exception Control
.)
Figure 18-1. IRQ Module Block Diagram
ACK
IMASK
DQ
CK
CLR
IRQ
HIGH
INTERRUPT
TO MODE
SELECT
LOGIC
IRQ
FF
REQUEST
V
DD
MODE
VOLTAGE
DETECT
SYNCHRO-
NIZER
IRQF
TO CPU FOR
BIL/BIH
INSTRUCTIONS
VECTOR
FETCH
DECODER
INTERNAL ADDRESS BUS
RESET
V
DD
I
NTERNAL
PULLUP
DEVICE
IRQ
Addr. Register Name Bit 7 654321Bit 0
$001A
IRQ Status and Control
Register
(ISCR)
Read: 0000IRQF 0
IMASK MODE
Write: ACK
Reset: 00000000
= Unimplemented
Figure 18-2. IRQ I/O Register Summary