1-3-3. Video Signal System
DCP-64 Board
The camera microcomputer SUN (IC702) performs the overall camera control, and is controlled by the system
microcomputer (IC2100: MELON) on the DPR-355 board. SUN's peripheral ICs FLASH ROM (IC701) and SDRAM
(IC700) are mounted on the DCP-64 board.
The digital video signal (Y/C) sent from the camera signal processor IC (IC101: RISE) on the VPR-124 board is input
to the baseband processing IC T-ONE (IC900).
The baseband processing IC T-ONE that incorporates scaler functions (supporting multi-format output), OSD, PLL (54
to 74 MHz), and CPU performs baseband processing for video and audio signals.
The baseband signal processed by T-ONE is sent to the router IC ANDV (IC1700), and is then distributed to inputs and
outputs. The following table lists inputs and outputs of the baseband processing IC T-ONE.
Signal name and input/output
• HD/SD digital component signal
Output to the router IC (Used for outputting SDI/HDMI/VIDEO OUT (without characters))
• HD/SD analog component signal
Output through the A/D converter (IC805) to the router IC (Used for outputting SDI/HDMI/VIDEO OUT (with
characters))
• Analog composite signal
Output to the IO-260 board
• Video signal for LCDVF
Output through the CN-3634 board to the LCD
• Video signal for CODEC
Output through the router IC to the CODEC (IC500: NATH) on the DPR-355 board
• Return video signal
Input from the router IC
• Audio interface signal
Output to the AU-357 board
The peripheral circuit of the baseband processing IC T-ONE contains the following circuit and devices.
• Master clock 54 MHz VCXO (X1400) control circuit (including IC1401)
• Mobile DDR SDRAM (IC1100, IC1101)
• FLASH ROM (IC1201) and SDRAM (IC1200) as peripheral ICs of the internal CPU
1-3-4. Media Recording/Playback System
DPR-355 Board
Output signals from the baseband processor IC (IC900) on the DCP-64 board are transferred to the router IC ANDV
(IC1700) and the selector IC CAVS (IC100) on the DPR-355 board, and are then input to the MPEG encoder/decoder
NATH (IC500) or the media block controller (IC1000).
The MPEG encoder/decoder (IC500) is a single-chip MPEG CODEC IC that encodes and decodes high-quality HD
image and audio signals in real time. It has various interfaces with MPEG video bitstream and baseband video input/
output.
The media block controller (IC1000) processes these signals and then files them, and writes the file data to the SxS
memory card through the SWC-56 board or the EC-78 board with the PCI-Express interface.
This controller performs operation opposite to this procedure in the playback mode.
Furthermore, the media block controller (IC1000) has an internal CPU and a USB device controller for router IC CAVS
(IC100) control, serial communication with the system controller (IC2100), and data communication with each controller
through the PCI bus.
PMW-300
1-7
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