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Renesas RL78/G1D User Manual

Renesas RL78/G1D
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RL78/G13 CHAPTER 8 INTERVAL TIMER
R01UH0146EJ0100 Rev.1.00 461
Sep 22, 2011
8.4 Interval Timer Operation
The count value specified for the ITCMP11 to ITCMP0 bits is used as an interval to operate an interval timer that
repeatedly generates interrupt requests (INTIT).
When the RINTE bit is set to 1, the 12-bit counter starts counting.
When the 12-bit counter value matches the value specified for the ITCMP11 to ITCMP0 bits, the 12-bit counter value is
cleared to 0, counting continues, and an interrupt request signal (INTIT) is generated at the same time.
The basic operation of the interval timer is as follows.
Figure 8-5. Interval Timer Operation Timing (ITCMP11 to ITCMP0 = 0FFH, count clock: f
SUB = 32.768 kHz)
INTIT
ITCMP11-
ITCMP0
RINTE
Count clock
12-bit counter
0FFH
000H
0FFH
After RINTE is changed from 0 to 1, counting starts
at the next rise of the count clock signal.
When RINTE is changed from 1 to 0,
the 12-bit counter is cleared without
synchronization with the count clock.
Period (7.81 ms)

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Renesas RL78/G1D Specifications

General IconGeneral
BrandRenesas
ModelRL78/G1D
CategoryComputer Hardware
LanguageEnglish

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