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Renesas RL78/G1D User Manual

Renesas RL78/G1D
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RL78/G13 CHAPTER 14 MULTIPLIER AND DIVIDER/MULTIPLY-ACCUMULATOR
R01UH0146EJ0100 Rev.1.00 796
Sep 22, 2011
14.4.4 Multiply-accumulation (signed) operation
• Initial setting
<1> Set the multiplication/division control register (MDUC) to 48H.
<2> Set the initial accumulated value of higher 16 bits to multiplication/division data register C (H) (MDCH).
(<3> If the accumulated value in the MDCH register is negative, the MACSF bit is set to 1.)
<4> Set the initial accumulated value of lower 16 bits to multiplication/division data register C (L) (MDCL).
<5> Set the multiplicand to multiplication/division data register A (L) (MDAL).
<6> Set the multiplier to multiplication/division data register A (H) (MDAH).
(There is no preference in the order of executing steps <2>, <4>, and <5>. Multiplication operation is
automatically started when the multiplier is set to the MDAH register, respectively.)
During operation processing
<7> The multiplication operation finishes in one clock cycle.
(The multiplication result is stored in multiplication/division data register B (L) (MDBL) and multiplication/division
data register B (H) (MDBH).)
<8> After <7>, the multiply-accumulation operation finishes in one additional clock cycle. (There is a wait of at least
two clock cycles after specifying the initial settings is finished (<6>).)
• Operation end
<9> If the accumulated value stored in the MDCL and MDCH registers is positive, the MACSF bit is cleared to 0.
<10> Read the accumulated value (lower 16 bits) from the MDCL register.
<11> Read the accumulated value (higher 16 bits) from the MDCH register.
(There is no preference in the order of executing steps <10> and <11>.)
(<12> If the result of the multiply-accumulation operation causes an overflow, the MACOF bit is set to 1, INTMD
signal is occurred.)
• Next operation
<13> To execute multiply-accumulation (signed) operation next, start from the “Initial setting” for multiply-accumulation
(signed) operation.
<14> The next time multiplication (signed or unsigned), multiply-accumulation (unsigned), or division is performed,
start with the initial settings of each step.
Caution The data is in the two's complement format in multiply-accumulation (signed) operation.
Remark Steps <1> to <12> correspond to <1> to <12> in Figure 14-9.
<R>

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Renesas RL78/G1D Specifications

General IconGeneral
BrandRenesas
ModelRL78/G1D
CategoryComputer Hardware
LanguageEnglish

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