RL78/G13 CHAPTER 19 RESET FUNCTION
R01UH0146EJ0100 Rev.1.00 880
Sep 22, 2011
The status of the RESF register when a reset request is generated is shown in Table 19-3.
Table 19-3. RESF Register Status When Reset Request Is Generated
Reset Source
Flag
RESET Input
Reset by
POR
Reset by
Execution of
Illegal
Instruction
Reset by
WDT
Reset by
RAM parity
error
Reset by
illegal-
memory
access
Reset by
LVD
TRAP bit Set (1) Held Held Held Held
WDTRF bit Held Set (1) Held Held Held
RPERF bit Held Held Set (1) Held Held
IAWRF bit Held Held Held Set (1) Held
LVIRF bit
Cleared (0) Cleared (0)
Held Held Held Held Set (1)