Xilinx VCU118 User Manual

VCU118 Board User Guide 77
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Chapter 3: Board Component Descriptions
The connections between the J6 and the FPGA are listed in Table 3-24.
For additional information about the FireFly connector, see the Samtec website [Ref 26].
Table 3-24: VCU118 Board FPGA U1 to FireFly J6 Connections
FPGA
(U1) Pin
FPGA (U1) Pin Name Schematic Net Name
FPGA (U1)
Direction
FireFly J6
Pin Num Pin Name
G5 MGTYTXP0_233 FIREFLY_TX1_P Output A3 TX1P
G4 MGTYTXN0_233 FIREFLY_TX1_N Output A2 TX1N
K2 MGTYRXP0_233 FIREFLY_RX1_P Input B17 RX1P
K1 MGTYRXN0_233 FIREFLY_RX1_N Input B18 RX1N
F7 MGTYTXP1_233 FIREFLY_TX2_P Output B3 TX2P
F6 MGTYTXN1_233 FIREFLY_TX2_N Output B2 TX2N
H2 MGTYRXP1_233 FIREFLY_RX2_P Input A17 RX2P
H1 MGTYRXN1_233 FIREFLY_RX2_N Input A18 RX2N
E5 MGTYTXP2_233 FIREFLY_TX3_P Output A6 TX3P
E4 MGTYTXN2_233 FIREFLY_TX3_N Output A5 TX3N
F2 MGTYRXP2_233 FIREFLY_RX3_P Input B14 RX3P
F1 MGTYRXN2_233 FIREFLY_RX3_N Input B15 RX3N
C5 MGTYTXP3_233 FIREFLY_TX4_P Output B6 TX4P
C4 MGTYTXN3_233 FIREFLY_TX4_N Output B5 TX4N
D2 MGTYRXP3_233 FIREFLY_RX4_P Input A14 RX4P
D1 MGTYRXN3_233 FIREFLY_RX4_N Input A15 RX4N
U28.20 SCL FIREFLY_SCL(1) Output 8 SCL
U28.19 SDA FIREFLY_SDA(1) BiDir 7 SDA
AN23 IO_L20N_T3L_N3_AD1N_64 FIREFLY_MODSEL_B
(1)
Output 4 MODSEL
AY22 IO_L10P_T1U_N6_QBC_AD4P_64 FIREFLY_RESET_B
(1)
Output 6 RESETL
AN24 IO_L20P_T3L_N2_AD1P_64 FIREFLY_MODPRS_B
(2)
Output 3 MODPRS
AT21 IO_T2U_N12_64 FIREFLY_INT_B
(2)
Input 5 INTL
NA NA UTIL_3V3_L4 NA (power) 1 VCC_TX
NA NA GND NA (power) 2 GND_14
NA NA VCC1V8 NA (power) 9 RSVD_14
NA NA UTIL_3V3_L5 NA (power) 10 VCC_RX
Notes:
1. Wired to bank 64 via level-shifter U33, I/O standard LVCMOS18.
2. Wired to bank 64 via level-shifter U21, I/O standard LVCMOS18.
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Xilinx VCU118 Specifications

General

Brand	Xilinx
Model	VCU118
Category	Motherboard
Language	English