Xilinx VCU118 User Manual

VCU118 Board User Guide 95
UG1224 (v1.0) December 15, 2016
www.xilinx.com
Chapter 3: Board Component Descriptions
The HPC1 J2 connections to FPGA U1 are documented in Table 3-31.
Table 3-31: J2 VITA 57.1 FMC HPC1 Connections
J2
FMC
HPC1
Pin
Schematic Net Name
I/O
Standard
FPGA
(U1)
Pin
J2
FMC
HPC1
Pin
Schematic Net Name
I/O
Standard
FPGA
(U1) Pin
J2 Sections A/B are no connects (not connected to FPGA U1)
J2 Sections C/D Connections to FPGA U1
C2 NC NA NA
D1 VADJ_1V8_PGOOD_LS (1) LVCMOS18 AK35
C3 NC NA NA D4 NC NA NA
C6 NC NA NA D5 NC NA NA
C7 NC NA NA D8 FMC_HPC1_LA01_CC_P LVDS AY9
C10 FMC_HPC1_LA06_P LVDS BD13 D9 FMC_HPC1_LA01_CC_N LVDS BA9
C11 FMC_HPC1_LA06_N LVDS BE13 D11 FMC_HPC1_LA05_P LVDS BE14
C14 FMC_HPC1_LA10_P LVDS BB13 D12 FMC_HPC1_LA05_N LVDS BF14
C15 FMC_HPC1_LA10_N LVDS BB12 D14 FMC_HPC1_LA09_P LVDS BA14
C18 FMC_HPC1_LA14_P LVDS AW7 D15 FMC_HPC1_LA09_N LVDS BB14
C19 FMC_HPC1_LA14_N LVDS BB16 D17 FMC_HPC1_LA13_P LVDS AY8
C22 FMC_HPC1_LA18_CC_P LVDS AP12 D18 FMC_HPC1_LA13_N LVDS AY7
C23 FMC_HPC1_LA18_CC_N LVDS AR12 D20 FMC_HPC1_LA17_CC_P LVDS AR14
C26 FMC_HPC1_LA27_P LVDS AL14 D21 FMC_HPC1_LA17_CC_N LVDS AT14
C27 FMC_HPC1_LA27_N LVDS AM14 D23 FMC_HPC1_LA23_P LVDS AN16
C30 FMC_HPC1_IIC_SCL (5) U80.9 D24 FMC_HPC1_LA23_N LVDS AP16
C31 FMC_HPC1_IIC_SDA (5) U80.8 D26 FMC_HPC1_LA26_P LVDS AK15
C34 GA0 = 0 = GND D27 FMC_HPC1_LA26_N LVDS AL15
C35 VCC12_SW D29 FMC_HPC1_TCK_BUF (2) U19.16
C37 VCC12_SW D30 FMCP_HSPC_TDO_HPC1_TDI (3)
U132.1,U
26.2,J22.
D31
C39 UTIL_3V3 D31 FMC_HPC1_TDO (3)
U132.2,U
13.8
D32 UTIL_3V3
D33 FMC_HPC1_TMS_BUF (2) U19.19
D34 NC
D35 GA1 = 0 = GND
D36 UTIL_3V3
D38 UTIL_3V3
D40 UTIL_3V3
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Xilinx VCU118 Specifications

General

Brand	Xilinx
Model	VCU118
Category	Motherboard
Language	English