HP 5920 Configuration Guide

73
Clock quality :
Class : 248
Accuracy : 254
Offset (log variance) : 65535
Offset from master : 0 (ns)
Mean path delay : 0 (ns)
Steps removed : 0
Local clock time : Sun Jan 15 20:57:29 2011
# Display brief PTP statistics on Device A.
[DeviceA] display ptp interface brief
Name State Delay mechanism Clock step Asymmetry correction
XGE1/0/1 Master P2P Two 0
# Display PTP clock information on Device B.
[DeviceB] display ptp clock
PTP profile : IEEE 1588 Version 2
PTP mode : P2PTC
Slave only : No
Clock ID : 000FE2-FFFE-FF0001
Clock type : Local
Clock domain : 0
Number of PTP ports : 2
Priority1 : 128
Priority2 : 128
Clock quality :
Class : 248
Accuracy : 254
Offset (log variance) : 65535
Offset from master : N/A
Mean path delay : N/A
Steps removed : N/A
Local clock time : Sun Jan 15 20:57:29 2011
# Display brief PTP statistics on Device B.
[DeviceB] display ptp interface brief
Name State Delay mechanism Clock step Asymmetry correction
XGE1/0/1 N/A P2P Two 0
XGE1/0/2 N/A P2P Two 0
PTP configuration example (IEEE 802.1AS)
Network requirements
As shown in Figure 25, a PTP domain comprises Device A, Device B, and Device C.
• Configure all devices to use PTP standard IEEE 802.1AS.
• Configure the clock node type of Device A and Device C as OC, and that of Device B as P2PTC. All
clock nodes elect a GM through BMC based on their respective default GM attributes.
• Configure the delay measurement mechanism for Device A and Device C as p2p.

HP 5920 Specifications

General

Brand	HP
Model	5920
Category	Switch
Language	English