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Renesas RL78/D1A User Manual

Renesas RL78/D1A
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RL78/F13, F14 CHAPTER 16 SERIAL INTERFACE IICA
R01UH0368EJ0210 Rev.2.10 1043
Dec 10, 2015
16.5.5 Stop condition
When the SCLA0 pin is at high level, changing the SDAA0 pin from low level to high level generates a stop condition.
A stop condition is a signal that the master device generates to the slave device when serial transfer has been completed.
When the device is used as a slave, stop conditions can be detected.
Figure 16-20. Stop Condition
A stop condition is generated when bit 0 (SPT0) of IICA control register 00 (IICCTL00) is set to 1. When the stop condition
is detected, bit 0 (SPD0) of the IICA status register 0 (IICS0) is set to 1 and INTIICA0 is generated when bit 4 (SPIE0) of the
IICCTL00 register is set to 1.
SCLA0
SDAA0
H

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Renesas RL78/D1A Specifications

General IconGeneral
BrandRenesas
ModelRL78/D1A
CategoryComputer Hardware
LanguageEnglish

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