RL78/F13, F14 CHAPTER 17 LIN/UART MODULE (RLIN3)
R01UH0368EJ0210 Rev.2.10 1200
Dec 10, 2015
(1) LIN Operation Mode
In LIN operation mode, frame processing (header transmission, header reception, response transmission, response
reception, and error detection) can be performed.
During a transition from LIN reset mode to LIN mode, setting the OM1 and OM0 bits in the LCUCn register to 11b changes
the mode to LIN operation mode, changing the OMM1 and OMM0 bits in the LMSTn register to 11b. Communication settings
should be performed after the LMSTn register has become 11b.
(2) LIN Wake-up Mode
In LIN wake-up mode, wake-up signal processing (wake-up transmission, wake-up reception, and error detection) can be
performed.
During a transition from LIN reset mode to LIN mode, setting the OM1 and OM0 bits in the LCUCn register to 01b changes
the mode to LIN wake-up mode, changing the OMM1 and OMM0 bits in the LMSTn register to 01b. Communication settings
should be performed after the LMSTn register has become 01b.
17.3.3 UART Mode
In LIN reset mode, setting the LMD bits in the LMDn register to 01b (UART mode) and the OM0 bit in the LCUCn register to
1b changes the mode to UART mode, turning the OMM0 bit in the LMSTn register to 1b. Communication settings should be
performed after the LMSTn register has become 01b.
17.3.4 LIN Self-Test Mode
Writing to the LSTCn register changes the mode to LIN self-test mode. The LSTM bit in the LSTCn register being 1 indicates
that the mode has transitioned to the LIN self-test mode.
For further details of operations, see 17.6 LIN Self-Test Mode.
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