RL78/F13, F14 CHAPTER 2 PIN FUNCTIONS
R01UH0368EJ0210 Rev.2.10 83
Dec 10, 2015
Table 2-6. Connection of Unused Pins (100-Pin Products of RL78/F14) (2/3)
Pin Name I/O Recommended Connection of Unused Pins
P50/(SSI01)/(INTP3) I/O Input: Independently connect to EVDD0 and EVDD1, or EVSS0 and EVSS1 via a
resistor.
Output: Leave open.
P51/(SO01)/INTP11
P52/(SCK01)/(STOPST)
P53/(SI01)/INTP10
P54/(TI11)/(TO11)/SSI10
P55/(TI13)/(TO13)
P56/(TI15)/(TO15)/(SNZOUT1)
P57/(TI17)/(TO17)/(SNZOUT0)
P60/(SCK00)/(SCL00)
P61/(SI00)/(SDA00)/(RXD0)
P62/(SO00)/(TXD0)/SCLA0
P63/(SSI00)/SDAA0
P64/(TI14)/(TO14)/(SNZOUT3)
P65/(TI16)/(TO16)/(SNZOUT2)
P66/(TI00)/(TO00)
P67/(TI02)/(TO02)
P70/ANI26/KR0/TI15/TO15/INTP8/
SI11/SDA11/SNZOUT4
P71/ANI27/KR1/TI17/TO17/INTP6/
SCK11/SCL11/SNZOUT5
P72/ANI28/KR2/(CTXD0)/SO11/SNZOUT6
P73/ANI29/KR3/(CRXD0)/SSI11/
SNZOUT7
P74/ANI30/KR4/(SO10)/(TXD1)
P75/KR5/(SI10)/(RXD1)
P76/KR6/(SCK10)
P77/KR7/(SSI10)/INTP12
P80/ANI2/ANO0 Input: Independently connect to VDD or VSS via a resistor.
Output: Leave open.
P81/ANI3/IVCMP00
P82/ANI4/IVCMP01
P83/ANI5/IVCMP02
P84/ANI6/IVCMP03
P85/ANI7/IVREF0
P86/ANI8
P87/ANI9
P90/ANI10
P91/ANI11
P92/ANI12
P93/ANI13
P94/ANI14
P95/ANI15
P96/ANI16
P97/ANI17
Remark Functions in parentheses in the above table can be assigned via settings in the peripheral I/O redirection
registers (PIOR).
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