Renesas RL78/F14 User Manual

RL78/F13, F14 CHAPTER 15 SERIAL ARRAY UNIT
R01UH0368EJ0210 Rev.2.10 1008
Dec 10, 2015
(2) Processing flow
Figure 15-151. Timing Chart of Data Reception
(a) When starting data reception
(b) When receiving last data
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0, 1), r: IIC number (r = 00, 01, 10, 11)
mn = 00, 01, 10, 11
D7 D6 D5 D4 D3 D2 D1 D0
SSmn
SEmn
SOEmn
SDRmn
SCLr output
SDAr output
SDAr input
Shift
register mn
INTIICr
TSFmn
ACK
STmn
TXEmn = 0 / RXEmn = 1
TXEmn,
RXEmn
TXEmn = 1 / RXEmn = 0
Shift operation
“H”
Dummy data (FFH)
Receive data
D7 D6 D5 D4 D3 D2 D1 D0D2 D1 D0
STmn
SEmn
SOEmn
SDRmn
SCLr output
SDAr output
SDAr input
Shift
register mn
INTIICr
TSFmn
Receive data Receive data
Output is enabled by serial
communication operation
Output is stopped by serial communication operation
NACKACK
TXEmn = 0 / RXEmn = 1
TXEmn,
RXEmn
Stop condition
Reception of last byte
IIC operation stop
SOmn bit
manipulation
CKOmn bit
manipulation
SOmn bit
manipulation
Shift operation
Dummy data (FFH)
Shift operation
Dummy data (FFH)

Renesas RL78/F14 Specifications

General

Brand	Renesas
Model	RL78/F14
Category	Computer Hardware
Language	English