RL78/F13, F14 CHAPTER 8 TIMER RD
R01UH0368EJ0210 Rev.2.10 567
Dec 10, 2015
CHAPTER 8 TIMER RD
Timer RD contains two 16-bit timer units (timer RD0 and timer RD1).
8.1 Overview
Each of timer RD0 and timer RD1 has four I/O pins.
The timer RD operating clock (f
TRD) is selectable from fCLK, fMP, or fSL.
Figure 8-1 shows the Timer RD Block Diagram and Table 8-1 lists the Timer RD Pin Configuration.
Timer RD has four modes:
ï‚· Timer mode
- Input capture function Transfer the counter value to a register with an external signal as the trigger
- Output compare function Detect register value matches with a counter (Pin output can be changed at detection)
- PWM function Output pulse of any width continuously
The following three modes use the PWM function.
ï‚· Reset synchronous PWM mode Output three-phase waveforms (6) without sawtooth wave modulation and dead time
ï‚· Complementary PWM mode Output three-phase waveforms (6) with triangular wave modulation and dead time
ï‚· PWM3 mode Output PWM waveforms (2) with a fixed period
The timer mode input capture function, output compare function, and PWM function are equivalent in timer RD0 and timer
RD1, and these functions can be selected individually for each pin. Also, a combination of these functions can be used in
timer RD0 and timer RD1.
In reset synchronous PWM mode, complementary PWM mode, and PWM3 mode, a waveform is output with a
combination of counters and registers in timer RD0 and timer RD1. Pin functions depend on the mode.