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RL78/F13, F14 CHAPTER 19 DTC

R01UH0368EJ0210 Rev.2.10 1453

Dec 10, 2015

19.3.3 Repeat Mode

One to 255 bytes of data are transferred by one activation. Either of the transfer source or destination should be specified

as the repeat area. The number of transfers can be 1 to 255 times. On completion of the specified number of transfers, the

DTCCTj (i = 0 to 23) register and the address specified for the repeat area are initialized to continue transfers. When the

data transfer causing the DTCCTj register value to change to 0 is performed while the RPTINT bit in the DTCCRj register is

1 (interrupt generation enabled), the DTC generates an interrupt request corresponding to the activation source to the

interrupt controller during DTC operation, and sets the corresponding bit among bits DTCENi0 to DTCENi7 (i = 0 to 5

Note

)

to 0 (activation disabled). When the RPTINT bit in the DTCCRj register is 0 (interrupt generation disabled), no interrupt

request is generated even if the data transfer causing the DTCCTj register value to change to 0 is performed. Also, bits

DTCENi0 to DTCENi7 are not set to 0.

Table 19-8 lists register functions in repeat mode. Figure 19-23 shows data transfers in repeat mode.

Note Products of groups A, B, C, and D: i = 0 to 4

Products of group E: i = 0 to 5

Table 19-8. Register Functions in Repeat Mode

DTC block size register j DTBLSj Size of the data block to be transferred by one activation

DTC transfer count register j DTCCTj Number of data transfers

DTC transfer count reload register j DTRLDj

This register value is reloaded to the DTCCT register

(the number of transfers is initialized).

DTC source address register j DTSARj Data transfer source address

DTC destination address register j DTDARj Data transfer destination address

Remark j = 0 to 23

Renesas RL78/F14 User Manual

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