CRC Calculation Circuit
M30240 Group
Rev.1.00 Sep 24, 2003 Page 109 of 360
1.2.25 CRC Calculation Circuit
The Cyclic Redundancy Check (CRC) calculation circuit detects an error in data blocks. The
microcomputer uses a generator polynomial of CRC_CCITT (X
16
+ X
12
+ X
5
+ 1) to generate CRC code.
The CRC code is a 16-bit code generated for a block of a given data length in multiples of 8 bits. The
CRC code is set in a CRC data register each time one byte of data is transferred to a CRC input register
after writing an initial value into the CRC data register. Generation of CRC code for one byte of data is
completed in two machine cycles.
Figure 1.104 shows the block diagram of the CRC circuit. Figure 1.105 shows the CRC-related registers.
Figure 1.104: Block diagram of CRC circuit
Figure 1.105: CRC-related registers
Eight low-order bits Eight high-order bits
Data bus high-order bits
Data bus low-order bits
CRC data register (16)
CRC input register (8)
CRC code generating circuit
x
16
+ x
12
+ x
5
+ 1
(Addresses 03BD16, 03BC
(Address 03BE
16)
16)
Symbol
Address
When reset
CRCD
03BD
16
, 03BC
16
Indeterminate
b7 b0 b7 b0
(b15) (b8)
CRC data register
WR
CRC calculation result output register
Function
Values that
can be set
0000
16
to FFFF
16
Symbo
Address
When reset
CRCIN
03BE
16
Indeterminate
b7 b0
CRC input register
WR
Data input register
Function
Values that
can be set
00
16
to FF
16
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