Clock-Asynchronous Serial I/O
M30240 Group
Rev.1.00 Sep 24, 2003 Page 222 of 360
2.5.2.4 Reception compliant with SIM interface
For receiving data in UART mode (compliant with SIM interface), select functions from those listed in
Table 2.23 . An example using the indicated options is described below. Figure 2.71 shows the operation
timing, and Figure 2.72 and Figure 2.73 show the set-up procedures.
Table 2.23: Serial I/O reception compliant with SIM interface functions
Operation
(1) Setting the transmit enable bit and receive enable bit to “1” readies data-receivable status.
(2) When the first bit (the start bit) of reception data is received from the RxD2 pin, data is received,
bit by bit, in sequence: LSB, ····, MSB, parity bit and stop bit(s).
(3) When the stop bit(s) is (are) received, the content of the UART2 receive register is transmitted to
the UART2 receive buffer register.
At this time, the receive complete flag goes to “1” to indicate that the reception has completed, the
UART2 receive interrupt request bit goes to “1”.
(4) The receive complete flag goes to “0” when the lower-order byte of the UART2 buffer register is
read.
(5) When a parity error occurs, TXD2 pin goes to “L” level.
Item
Set-up
Transfer data format
O Direct format
Inverse format
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