Renesas M16C Series User Manual

Power Control
M30240 Group
Rev.1.00 Sep 24, 2003 Page 280 of 360
2.12.3 Wait Mode Set-Up
Settings and operation for entering wait mode are described here.
(1) Enable the interrupt used that is to be used for returning from wait mode.
(2) Set the interrupt enable flag (I flag) to “1”.
(3) Clear the protection register.
(4) Change the content of the system clock control register.
(5) Execute the WAIT instruction.
Figure 1.129 shows the set up for the Wait mode.
Figure 2.129: Set-up for Wait mode
Wait mode
(3) Canceling protect
b7 b0
Protect register [Address 000A 16 ]
PRCR
1
Enables writing to system clock control registers 0 and 1
(addresses 0006
16 and 0007 16 )
1 : Write-enabled
(5) WAIT instruction
(4) Control of CPU clock
Note: When switching the system clock, it is necessary
to wait for the oscillation to stabilize.
b7 b0
WAIT peripheral function clock stop bit
0 : Do not stop f
1 , f 8 , f 32 in wait mode
1 : Stop f
1 , f 8 , f 32 in wait mode
Reserved bit. Must be set to "0"
Main clock division select bit 0
0 : CM16 and CM17 valid
1 : Division by 8 mode
Reserved bit. Must be set to "0'
System clock control register 0
[Address 0006
16 ] CM0
b7 b0
System clock control register 1
[Address 0007
16 ] CM10000
Reserved bit
Must be set to “0”
Main clock division select bit
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
b7 b6
Make sure that the interrupt priority
level of the interrupt which is used
to cancel the wait mode is higher
than the processor interrupt priority
(IPL) of the routine where the
WAIT instruction is executed.
Interrupt priority level select bit
b7 b0
Make sure that the interrupt priority level of the
interrupt which is used to cancel the wait mode is
higher than the processor interrupt priority (IPL) of
the routine where the WAIT instruction is executed.
Interrupt priority level select bit
b7 b0
0
Reserved bit
Must be set to “0”
(2) Interrupt enable flag (I flag) “1”
Interrupt control register
BCNIC [Address 004A 16 ]
KUPIC [Address 004D
16 ]
SiTIC(i=0 to 2) [Address 0051
16 , 0053 16 , 004F 16 ]
SiRIC(i=0 to 2) [Address 0052
16 , 0054 16 , 0050 16 ]
TAiIC(i=0 to 4) [Address 0055
16 to 0059 16 ]
TBiIC(i=0 to 1) [Address 005A
16 to 005B 16 ]
SUSPIC [Address 0044
16 ]
RSMIC [Address 0046
16 ]
RSTIC [Address 005C
16 ]
USBFIC [Address 005F
16 ]
(1) Setting interrupt to cancel stop mode
SOFIC [Address 0047 16 ]
INTiIC (i=0 to 1)
[Address 005D
16 to 005E 16 ]
0001
Reserved bit.
Must be set to "1"

Renesas M16C Series Specifications

General

Architecture	16-bit
Core	M16C
Instruction Set Architecture	CISC
Flash Memory	Up to 512 KB
Operating Voltage	2.7V to 5.5V
Operating Temperature Range	-40°C to +85°C
Package Types	LQFP, QFP
Timers	Multiple 16-bit timers
ADC	10-bit
Communication Interfaces	UART, SPI, I2C
Interrupts	Multiple interrupt sources

Summary

Chapter 1: Hardware

1.1 Description

Overview of the M30240 group as a single-chip USB peripheral microcontroller based on M16C family.

1.1.1 Features

Lists the key features of the M30240 group, including CPU, USB capabilities, memory, voltage, and peripherals.

1.1.3 Pin Configuration

Shows the pin configuration (top view) of the M30240 group, detailing each pin's name, I/O, and basic function.

1.1.4 Block Diagram

Presents a block diagram illustrating the internal structure and major components of the M30240 group.

1.1.5 Performance outline

Details the performance specifications of the M30240 group, including instruction count, memory capacity, and I/O ports.

1.1.6 Pin Description

Provides a detailed description of each pin of the M30240 microcontroller, including its name, I/O type, and functions.

CHAPTER 2: PERIPHERAL FUNCTIONS USAGE

2.1 Protect

Explains the protect function to prevent unintended changes to important registers when a program runs away.

2.2 Timer A

Provides an overview and detailed operation modes of the 16-bit Timer A, including timer, event counter, and PWM modes.

2.3 Timer B

Details the operation and registers of Timer B, a 16-bit timer that operates only in timer mode.

2.4 Clock-Synchronous Serial I/O

Explains clock-synchronous serial communication, including transmission/reception formats, transfer rates, and error detection.

2.5 Clock-Asynchronous Serial I/O (UART)

Covers UART operations, including transmission/reception formats, transfer rates, error detection, and functions like SIM interface compliance.

2.6 A-D Converter

Describes the A-D converter, its modes of operation, conversion clock, conversion time, and related registers.

2.7 DMAC

Explains the DMAC (Direct Memory Access Controller) for data transfer between memory and peripherals without CPU intervention.

2.10 Address Match Interrupt

Explains the address match interrupt functionality for simplified debugging, including enable/disable and timing.

2.11 Key-Input Interrupt

Describes the key-input interrupt, which is generated by falling edges on Port 0 or Port 1 pins used as input.

2.12 Power Control

Explains power control modes (Normal, Wait, Stop) for reducing CPU power consumption by stopping oscillators or clocks.

2.13 Programmable I/O Ports

Details the programmable I/O ports, including direction registers, port registers, pull-up control, and high drive capacity.

Chapter 3 Universal Serial Bus

3.1 Frequency Synthesizer

Explains how to set up and use the frequency synthesizer to generate the 48MHz clock for USB and DC-DC converter power.

3.2 Universal Serial Bus

Provides an overview of the Universal Serial Bus (USB) features, including specification compatibility, error handling, and transfer types.

3.2.2 USB Related Registers

Lists and describes USB-related registers for controlling USB functionality, including control, status, and enable registers.

3.2.7 USB Interrupts

Details the types of USB interrupts (Function, Reset, Resume, SOF, Suspend) and their handling via enable flags and priority levels.

3.2.8 USB Function Control Unit Initialization

Outlines the initialization routine for the USB Function Control Unit, including frequency synthesizer setup and endpoint initialization.

3.2.9 USB Control Transfers and SET_ADDRESS Request

Explains USB control transfers, the SET_ADDRESS request, and procedures for setting the device address.

Chapter 4 Interrupts

4.1 Overview of Interrupts

Provides an overview of interrupt types, including software, hardware, special, and peripheral I/O interrupts.

4.1.1 Type of Interrupts

Classifies interrupts into maskable and non-maskable types, detailing software and hardware interrupt categories.

4.1.2 Interrupt Vector Tables

Describes interrupt vector tables, including fixed and variable types, and lists interrupts assigned to fixed vector tables.

4.1.3 Interrupt Control

Explains interrupt control registers, interrupt request bits, enable flags, and priority levels for managing interrupts.

4.1.4 Interrupt Sequence

Details the sequence of operations when an interrupt occurs, including saving registers and processor control flow.

4.1.5 Multiple Interrupts

Explains how multiple interrupts are handled, including priority levels and interrupt acceptance conditions.

Chapter 5 Built-in PROM Version

5.1 Built-in PROM Version

Introduces the built-in PROM version, its functions, and available types (OTP and EPROM).

5.1.1 Outline

Outlines the capabilities of the built-in PROM version, including programming methods and suitability for different production volumes.

5.2 EPROM version

Describes the EPROM version, its operating modes (Normal, EPROM), and related pins.

5.2.1 EPROM mode pins

Lists pin functions specifically for the EPROM mode, detailing their roles in programming and verification.

5.2.2 Input/Output signals

Explains the input/output signals for Read, Program, and Erase operations in EPROM mode.

5.2.3 Algorithm Programming

Details the step-by-step algorithm for programming the built-in PROM, including voltage settings and pulse application.

5.3 Usage Precaution

Provides precautions for using built-in PROM versions, including handling of high voltage and protection of the EPROM window.

5.3.1 Built-in PROM versions

Offers specific cautions for programming built-in PROM versions, emphasizing voltage and power-on sequences.

5.3.2 One-time PROM versions

Highlights that OTP versions are not tested/screened, recommending programming and testing for reliability.

5.3.3 EPROM versions

Advises on protecting the EPROM window from light and cleaning it before erasure for optimal performance.

Chapter 6 Standard Characteristics

6.1 Standard DC Characteristics

Presents standard DC characteristics of the M30240EC, including output currents and voltage ratings.