Clock-Synchronous Serial I/O
M30240 Group
Rev.1.00 Sep 24, 2003 Page 179 of 360
(g) Function for choosing a transmission interrupt factor.
The timing to generate a transmission interrupt can be selected from the following: the instant the
transmission buffer is emptied or the instant the transmission register is emptied. When transmission
buffer empty timing is selected, an interrupt occurs when the transmitted data is moved from the trans-
mission buffer to the transmission register. Therefore, data can be transmitted in succession. When
transmission register empty timing is selected, an interrupt occurs when the data transmission is com-
plete.
(h) TxD, RxD I/O polarity reverse function
This function is to reverse the polarity of the TxD port output level and the polarity of the RxD port input
level.
The following are some examples in which various functions (a) through (g) are selected:
2.4.1.6 Input to the serial I/O and the direction register
To input an external signal to the serial I/O, set the direction register of the relevant port to input.
2.4.1.7 Pins related to the serial I/O
• Transmission Operation WITH: CTS
function, trans-
mission at falling edge of transfer clock, LSB First,
interrupt at instant transmission buffer is emptied;
WITHOUT transfer clock output to multiple pins
function
See section 2.4.2.1
• Transmission Operation WITH: CTS/RTS function
disabled, transmission at falling edge of transfer
clock, LSB First, interrupt at instant transmission is
completed; WITH transfer clock output to multiple
pins function (UART0 selection available)
See section 2.4.2.2
• Reception WITH: RTS function, reception at falling
edge of transfer clock, LSB First, successive recep-
tion mode disabled; WITHOUT transfer clock output
to multiple pins function
See section 2.4.2.3
• CTS0
, CTS1, CTS2 pins Input pins for the CTS function
• RTS0
, RTS1, RTS2 pins Output pins for the RTS function
• CLK0, CLK1, CLK2 pins Input/output pins for the transfer clock
• RxD0, RxD1, RxD2 pins Input pins for data
• TxD0, TxD1, TxD2 pins Output pins for data (Because TxD2
pin is N-channel open drain, this pin
needs pull-up resistor).
• CLKS1 pin Output pin for transfer clock. Can be
used as transfer clock output pin in the
transfer clock output to multiple pins
function.
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